Issued Patents All Time
Showing 51–75 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7262987 | SRAM cell using tunnel current loading devices | John A. Fifield, Harold Pilo | 2007-08-28 |
| 7253066 | MOSFET with decoupled halo before extension | Jeffrey S. Brown, Kiran V. Chatty, Robert J. Gauthier, Jr., Carl Radens, William R. Tonti | 2007-08-07 |
| 7227239 | Resettable fuse device and method of fabricating the same | John A. Fifield, Robert J. Gauthier, Jr., William R. Tonti | 2007-06-05 |
| 7215002 | Electronically programmable antifuse and circuits made therewith | John A. Fifield, William R. Tonti | 2007-05-08 |
| 7167053 | Integrated circuit amplifier device and method using FET tunneling gate current | Anthony R. Bonaccio, Kiran V. Chatty, John A. Fifield | 2007-01-23 |
| 7163851 | Concurrent Fin-FET and thick-body device fabrication | Jeffrey S. Brown, David M. Fried, Robert J. Gauthier, Jr., Edward J. Nowak, Jed H. Rankin +1 more | 2007-01-16 |
| 7141998 | Method and apparatus for burn-in optimization | Harold Pilo, Daryl M. Seitzer | 2006-11-28 |
| 7132325 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Eric Adler, Jeffrey S. Brown, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more | 2006-11-07 |
| 7087499 | Integrated antifuse structure for FINFET and CMOS devices | Jed H. Rankin, Jeffrey S. Brown, William R. Tonti | 2006-08-08 |
| 7061308 | Voltage divider for integrated circuits | John A. Fifield, William R. Tonti | 2006-06-13 |
| 6982591 | Method and circuit for compensating for tunneling current | Jennifer E. Appleyard, John A. Fifield, William R. Tonti | 2006-01-03 |
| 6917319 | Digital to analog converter using tunneling current element | John A. Fifield | 2005-07-12 |
| 6913965 | Non-Continuous encapsulation layer for MIM capacitor | Eric Adler, Zhong-Xiang He, Bradley A. Orner, Vidhya Ramachandran, Barbara Waterhouse +1 more | 2005-07-05 |
| 6879021 | Electronically programmable antifuse and circuits made therewith | John A. Fitfield, William R. Tonti | 2005-04-12 |
| 6876035 | High voltage N-LDMOS transistors having shallow trench isolation region | Jeffrey S. Brown, Robert J. Gauthier, Jr., Jed H. Rankin, William R. Tonti | 2005-04-05 |
| 6770907 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Eric Adler, Jeffrey S. Brown, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more | 2004-08-03 |
| 6730552 | MOSFET with decoupled halo before extension | Jeffrey S. Brown, Kiran V. Chatty, Robert J. Gauthier, Jr., Carl Radens, William R. Tonti | 2004-05-04 |
| 6731179 | System and method for measuring circuit performance degradation due to PFET negative bias temperature instability (NBTI) | Wayne F. Ellis, Patrick R. Hansen, Jonathan M. McKenna | 2004-05-04 |
| 6714113 | Inductor for integrated circuits | Robert A. Groves, Patrick R. Hansen | 2004-03-30 |
| 6624031 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Eric Adler, Jeffrey S. Brown, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more | 2003-09-23 |
| 6602772 | Method for non-contact stress evaluation of wafer gate dielectric reliability | Eduard A. Cartier, James H. Stathis | 2003-08-05 |
| 6326732 | Apparatus and method for non-contact stress evaluation of wafer gate dielectric reliability | Eduard A. Cartier, James H. Stathis | 2001-12-04 |
| 6278339 | Termination resistance independent system for impedance matching in high speed input-output chip interfacing | John Connor, Patrick R. Hansen | 2001-08-21 |
| 6249193 | Termination impedance independent system for impedance matching in high speed input-output chip interfacing | John Connor, Patrick R. Hansen | 2001-06-19 |
| 6188234 | Method of determining dielectric time-to-breakdown | Jonathan M. McKenna | 2001-02-13 |