Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6518145 | Methods to control the threshold voltage of a deep trench corner device | Johann Alsmeier, George R. Goth, Max G. Levy, James A. O'Neill, Paul C. Parries | 2003-02-11 |
| 6372573 | Self-aligned trench capacitor capping process for high density DRAM cells | Masami Aoki, Hirofumi Inoue, Bruce W. Porth, Max G. Levy, Emily E. Fisch +1 more | 2002-04-16 |
| 5824580 | Method of manufacturing an insulated gate field effect transistor | Manfred Hauf, Max G. Levy | 1998-10-20 |
| 5804490 | Method of filling shallow trenches | Bernhard Fiegl, Walter Glashauser, Max G. Levy | 1998-09-08 |
| 5757059 | Insulated gate field effect transistor | Manfred Hauf, Max G. Levy | 1998-05-26 |
| 5721448 | Integrated circuit chip having isolation trenches composed of a dielectric layer with oxidation catalyst material | Manfred Hauf, Max G. Levy | 1998-02-24 |
| 5385850 | Method of forming a doped region in a semiconductor substrate utilizing a sacrificial epitaxial silicon layer | Jack O. Chu, Chang-Ming Hsieh, Martin Revitz, Paul A. Ronsheim | 1995-01-31 |
| 5331199 | Bipolar transistor with reduced topography | Shao-fu Sanford Chu, Kyong-Min Kim, Shaw-Ning Mei, Somnuk Ratanaphanyarat | 1994-07-19 |
| 5234846 | Method of making bipolar transistor with reduced topography | Shao-fu Sanford Chu, Kyong-Min Kim, Mei Shaw-Ning, Somnuk Ratanaphanyarat | 1993-08-10 |
| 4666556 | Trench sidewall isolation by polysilicon oxidation | Inge G. Fulton, James S. Makris, Anthony F. Scaduto, Anne C. Shartel | 1987-05-19 |