Issued Patents All Time
Showing 1–25 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11721609 | Through silicon contact structure and method of forming the same | Liang Chen, Wei Liu | 2023-08-08 |
| 11710679 | Through silicon contact structure and method of forming the same | Liang Chen, Wei Liu | 2023-07-25 |
| 11069596 | Through silicon contact structure and method of forming the same | Liang Chen, Wei Liu | 2021-07-20 |
| 10847534 | Staircase structures for three-dimensional memory device double-sided routing | — | 2020-11-24 |
| 9466661 | Method of fabricating a MIM capacitor with minimal voltage coefficient and a decoupling MIM capacitor and analog/RF MIM capacitor on the same chip with high-K dielectrics | Dina H. Triyoso, Bo Yu | 2016-10-11 |
| 9269770 | Integrated circuit system with double doped drain transistor | Yisuo Li, Gang Chen, Francis Benistant, Purakh Raj Verma, Hong-Seon Yang | 2016-02-23 |
| 8536016 | Integrated circuit system with hierarchical capacitor and method of manufacture thereof | Shaoqiang Zhang, Johnny Kok Wai Chew | 2013-09-17 |
| 8138051 | Integrated circuit system with high voltage transistor and method of manufacture thereof | Yemin Dong, Purakh Raj Verma, Xin Zou, Chao-Ming Cheng | 2012-03-20 |
| 8115276 | Integrated circuit system employing back end of line via techniques | Shaoqing Zhang, Fan Zhang, Bei Chao Zhang | 2012-02-14 |
| 8021954 | Integrated circuit system with hierarchical capacitor and method of manufacture thereof | Shaoqing Zhang, Johnny Kok Wai Chew, Chit Hwei Ng | 2011-09-20 |
| 7951680 | Integrated circuit system employing an elevated drain | Guowei Zhang, Yisuo Li, Ming-Shuan Li, Purakh Raj Verma | 2011-05-31 |
| 7721414 | Method of manufacturing 3-D spiral stacked inductor on semiconductor material | Choon-Beng Sia, Kiat Seng Yeo, Cheng Yeow Ng, Kok Wai Chew, Wang Ling Goh | 2010-05-25 |
| 7268412 | Double polysilicon bipolar transistor | Purakh Raj Verma | 2007-09-11 |
| 7238971 | Self-aligned lateral heterojunction bipolar transistor | Jian Xun Li, Lap Chan, Purakh Raj Verma, Jia Zhen Zheng | 2007-07-03 |
| 7078998 | Via/line inductor on semiconductor material | Jiong Zhang, Yi-Min Wang | 2006-07-18 |
| 7049201 | Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy | Purakh Raj Verma, Lap Chan, Jian Xun Li, Jia Zhen Zheng | 2006-05-23 |
| 7022578 | Heterojunction bipolar transistor using reverse emitter window | Purakh Raj Verma, Lap Chan, Jian Xun Li, Zhen Jia Zheng | 2006-04-04 |
| 6972237 | Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth | Purakh Raj Verma, Lap Chan, Jia Zhen Zheng, Jian Xun Li | 2005-12-06 |
| 6936519 | Double polysilicon bipolar transistor and method of manufacture therefor | Purakh Raj Verma | 2005-08-30 |
| 6924202 | Heterojunction bipolar transistor with self-aligned emitter and sidewall base contact | Jian Xun Li, Lap Chan, Purakh Raj Verma, Jia Zhen Zheng | 2005-08-02 |
| 6908824 | Self-aligned lateral heterojunction bipolar transistor | Jian Xun Li, Lap Chan, Purakh Raj Verma, Jia Zhen Zheng | 2005-06-21 |
| 6881976 | Heterojunction BiCMOS semiconductor | Jia Zhen Zheng, Lap Chan | 2005-04-19 |
| 6841847 | 3-D spiral stacked inductor on semiconductor material | Choon-Beng Sia, Kiat Seng Yeo, Cheng Yeow Ng, Kok Wai Chew, Wang Ling Goh | 2005-01-11 |
| 6750750 | Via/line inductor on semiconductor material | Zhang Jiong, Yi-Min Wang | 2004-06-15 |
| 6709918 | Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technology | Chit Hwei Ng, Jian Xun Li, Kok Wai Chew, Tjin Tjin Tjoa, Chaw Sing Ho | 2004-03-23 |