Issued Patents All Time
Showing 76–100 of 265 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7606013 | Electro-static discharge protection circuit | John J. Ellis-Monaghan | 2009-10-20 |
| 7582949 | Semiconductor devices | Xuefeng Liu, Robert M. Rassel | 2009-09-01 |
| 7560778 | Charge modulation network for multiple power domains for silicon-on-insulator technology | David Cain, Jeffrey P. Gambino, Norman J. Rohrer, Daryl M. Seltzer | 2009-07-14 |
| 7549135 | Design methodology of guard ring design resistance optimization for latchup prevention | Phillip F. Chapman, David S. Collins | 2009-06-16 |
| 7541247 | Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication | — | 2009-06-02 |
| 7538409 | Semiconductor devices | Xuefeng Liu, Robert M. Rassel | 2009-05-26 |
| 7535105 | Inter-chip ESD protection structure for high speed and high frequency devices | — | 2009-05-19 |
| 7521359 | Interconnect structure encased with high and low k interlevel dielectrics | — | 2009-04-21 |
| 7498622 | Latchup robust gate array using through wafer via | Phillip F. Chapman, David S. Collins | 2009-03-03 |
| 7485965 | Through via in ultra high resistivity wafer and related methods | Louis D. Lanzerotti, Max G. Levy, Yun Shi | 2009-02-03 |
| 7482258 | Product and method for integration of deep trench mesh and structures under a bond pad | Ephrem G. Gebreselasie, William T. Motsiff, Wolfgang Sauter | 2009-01-27 |
| 7477497 | Apparatus for electrostatic discharge protection of bipolar emitter follower circuits | Alan B. Botula | 2009-01-13 |
| 7473643 | Dendrite growth control circuit | Douglas B. Hershberger, Michael J. Zierak | 2009-01-06 |
| 7459367 | Method of forming a vertical P-N junction device | Benjamin T. Voegeli | 2008-12-02 |
| 7445966 | Method and structure for charge dissipation during fabrication of integrated circuits and isolation thereof | John J. Ellis-Monaghan, Jeffrey P. Gambino, Timothy D. Sullivan | 2008-11-04 |
| 7442996 | Structure and method for enhanced triple well latchup robustness | David S. Collins, James A. Slinkman | 2008-10-28 |
| 7439145 | Tunable semiconductor diodes | — | 2008-10-21 |
| 7427551 | High tolerance TCR balanced high current resistor for RF CMOS and RF SiGe BiCMOS applications and cadenced based hierarchical parameterized cell design kit with tunable TCR and ESD resistor ballasting feature | Ebenezer E. Eshun | 2008-09-23 |
| 7411305 | Interconnect structure encased with high and low k interlevel dielectrics | — | 2008-08-12 |
| 7401311 | Methodology for placement based on circuit function and latchup sensitivity | — | 2008-07-15 |
| 7384854 | Method of forming low capacitance ESD robust diodes | — | 2008-06-10 |
| 7358572 | Radiation tolerant electrostatic discharge protection networks | — | 2008-04-15 |
| 7350160 | Method of displaying a guard ring within an integrated circuit | Charles Nicholas Perez | 2008-03-25 |
| 7348657 | Electrostatic discharge protection networks for triple well semiconductor devices | James P. Pequignot, Jeffrey H. Sloan, Douglas W. Stout | 2008-03-25 |
| 7348251 | Modulated trigger device | Michael J. Zierak | 2008-03-25 |