Issued Patents All Time
Showing 26–50 of 138 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9496854 | High-speed latch circuits by selective use of large gate pitch | Robert K. Montoye | 2016-11-15 |
| 9460383 | Reconfigurable and customizable general-purpose circuits for neural networks | Bernard V. Brezzo, Steven K. Esser, Daniel J. Friedman, Yong Liu, Dharmendra S. Modha +4 more | 2016-10-04 |
| 9373073 | Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptation | John V. Arthur, Bernard V. Brezzo, Daniel J. Friedman, Paul A. Merolla, Dharmendra S. Modha +3 more | 2016-06-21 |
| 9368502 | Replacement gate multigate transistor for embedded DRAM | Josephine B. Chang, Michael A. Guillorn, Wilfried E. Haensch | 2016-06-14 |
| 9331577 | Slab inductor device providing efficient on-chip supply voltage conversion and regulation | David Goren, Naigang Wang | 2016-05-03 |
| 9318957 | Slab inductor device providing efficient on-chip supply voltage conversion and regulation | David Goren, Naigang Wang | 2016-04-19 |
| 9312761 | Three-D power converter in three distinct strata | Paul S. Andry, Evan G. Colgan, John U. Knickerbocker, Bucknell C. Webb, Robert L. Wisnieff | 2016-04-12 |
| 9287780 | Slab inductor device providing efficient on-chip supply voltage conversion and regulation | David Goren, Naigang Wang | 2016-03-15 |
| 9281821 | Time division multiplexed limited switch dynamic logic | Robert K. Montoye, Yutaka Nakamura | 2016-03-08 |
| 9276580 | Time division multiplexed limited switch dynamic logic | Robert K. Montoye, Yutaka Nakamura | 2016-03-01 |
| 9239984 | Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural network | John V. Arthur, Bernard V. Brezzo, Daniel J. Friedman, Paul A. Merolla, Dharmendra S. Modha +3 more | 2016-01-19 |
| 9230989 | Hybrid CMOS nanowire mesh device and FINFET device | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2016-01-05 |
| 9162877 | Lateral etch stop for NEMS release etch for high density NEMS/CMOS monolithic integration | Josephine B. Chang, Sebastian U. Engelmann, Michael A. Guillorn | 2015-10-20 |
| 9124173 | Slab inductor device providing efficient on-chip supply voltage conversion and regulation | David Goren, Naigang Wang | 2015-09-01 |
| 9118242 | Slab inductor device providing efficient on-chip supply voltage conversion and regulation | David Goren, Naigang Wang | 2015-08-25 |
| 9053981 | Hybrid CMOS nanowire mesh device and PDSOI device | Josephine B. Chang, Chung-Hsun Lin, Jeffrey W. Sleight | 2015-06-09 |
| 9030235 | Time division multiplexed limited switch dynamic logic | Robert K. Montoye, Yutaka Nakamura | 2015-05-12 |
| 9030234 | Time division multiplexed limited switch dynamic logic | Robert K. Montoye, Yutaka Nakamura | 2015-05-12 |
| 9000556 | Lateral etch stop for NEMS release etch for high density NEMS/CMOS monolithic integration | Josephine B. Chang, Sebastian U. Engelmann, Michael A. Guillorn | 2015-04-07 |
| 8969964 | Embedded silicon germanium N-type field effect transistor for reduced floating body effect | Isaac Lauer, Chung-Hsun Lin, Jeffrey W. Sleight | 2015-03-03 |
| 8940591 | Embedded silicon germanium N-type filed effect transistor for reduced floating body effect | Isaac Lauer, Chung-Hsun Lin, Jeffrey W. Sleight | 2015-01-27 |
| 8928295 | Reconfigurable switched-capacitor voltage converter circuit, integrated circuit (IC) chip including the circuit and method of switching voltage on chip | Robert K. Montoye, Jae-sun Seo | 2015-01-06 |
| 8929133 | Complementary SOI lateral bipolar for SRAM in a CMOS platform | Jin Cai, Jeffrey W. Sleight | 2015-01-06 |
| 8927312 | Method of fabricating MEMS transistors on far back end of line | Guy M. Cohen, Michael A. Guillorn, Effendi Leobandung, Fei Liu, Ghavam G. Shahidi | 2015-01-06 |
| 8917547 | Complementary SOI lateral bipolar for SRAM in a CMOS platform | Jin Cai, Jeffrey W. Sleight | 2014-12-23 |