Issued Patents All Time
Showing 1,426–1,450 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9954109 | Vertical transistor including controlled gate length and a self-aligned junction | Ramachandra Divakaruni | 2018-04-24 |
| 9954116 | Electrostatically enhanced fins field effect transistors | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2018-04-24 |
| 9953884 | Field effect transistor including strained germanium fins | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-04-24 |
| 9953918 | Method of fabricating anti-fuse for silicon on insulator devices | Ali Khakifirooz, Juntao Li | 2018-04-24 |
| 9953977 | FinFET semiconductor device | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2018-04-24 |
| 9947747 | Fully depleted silicon-on-insulator device formation | Shawn P. Fetterolf, Ahmet S. Ozcan | 2018-04-17 |
| 9947740 | On-chip MIM capacitor | Peng Xu | 2018-04-17 |
| 9947663 | FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-04-17 |
| 9947548 | Self-aligned single dummy fin cut with tight pitch | Cheng Chi, Chi-Chun Liu, Peng Xu | 2018-04-17 |
| 9947529 | Porous fin as compliant medium to form dislocation-free heteroepitaxial films | Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana | 2018-04-17 |
| 9947763 | FinFET with reduced capacitance | Veeraraghavan S. Basker, Ali Khakifirooz, Charles W. Koburger, III | 2018-04-17 |
| 9947774 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Ruilong Xie, Tenko Yamashita | 2018-04-17 |
| 9947775 | Replacement III-V or germanium nanowires by unilateral confined epitaxial growth | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-04-17 |
| 9947793 | Vertical pillar-type field effect transistor and method | Ruilong Xie, Tenko Yamashita | 2018-04-17 |
| 9941202 | Dielectric thermal conductor for passivating efuse and metal resistor | Qing Cao, Zhengwen Li, Fei Liu | 2018-04-10 |
| 9942761 | User access verification | Shawn P. Fetterolf | 2018-04-10 |
| 9941392 | Gate planarity for FinFET using dummy polish stop | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-04-10 |
| 9941385 | Finfet with reduced capacitance | Veeraraghavan S. Basker, Ali Khakifirooz, Charles W. Koburger, III | 2018-04-10 |
| 9941378 | Air-gap top spacer and self-aligned metal gate for vertical FETs | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-04-10 |
| 9941370 | Vertical field-effect-transistors having multiple threshold voltages | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-04-10 |
| 9941352 | Transistor with improved air spacer | Zhenxing Bi, Juntao Li, Peng Xu | 2018-04-10 |
| 9941205 | Electrical fuse and/or resistor structures | Veeraraghavan S. Basker, Ali Khakifirooz, Juntao Li | 2018-04-10 |
| 9941150 | Method and structure for minimizing fin reveal variation in FinFET transistor | Zhenxing Bi, Juntao Li, Hao Tang | 2018-04-10 |
| 9935014 | Nanosheet transistors having different gate dielectric thicknesses on the same chip | Juntao Li, Geng Wang, Qintao Zhang | 2018-04-03 |
| 9935018 | Methods of forming vertical transistor devices with different effective gate lengths | Ruilong Xie, Chun-Chen Yeh, Tenko Yamashita | 2018-04-03 |