Issued Patents All Time
Showing 351–375 of 403 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5668399 | Semiconductor device with increased on chip decoupling capacitance | John Andrew Hiltebeitel | 1997-09-16 |
| 5668018 | Method for defining a region on a wall of a semiconductor structure | Joseph E. Gortych | 1997-09-16 |
| 5665626 | Method of making a chimney capacitor | — | 1997-09-09 |
| 5663101 | Semiconductor structure having multiple levels of self-aligned interconnection metallization, and methods for its preparation | — | 1997-09-02 |
| 5661330 | Fabrication, testing and repair of multichip semiconductor structures having connect assemblies with fuses | Bruno Roberto Aimi, Andre Conrad Forcier, James M. Leas, Patricia McGuinnes Marmillion, Anthony M. Palagonia +2 more | 1997-08-26 |
| 5656544 | Process for forming a polysilicon electrode in a trench | Albert S. Bergendahl, Claude L. Bertin, Howard L. Kalter, Donald M. Kenney, Chung H. Lam +1 more | 1997-08-12 |
| 5654238 | Method for etching vertical contact holes without substrate damage caused by directional etching | Michael D. Potter, Gorden Seth Starkey, Jr. | 1997-08-05 |
| 5654221 | Method for forming semiconductor chip and electronic module with integrated surface interconnects/components | Stephen E. Luce, Steven H. Voldman | 1997-08-05 |
| 5651857 | Sidewall spacer using an overhang | Patricia E. Marmillion, Anthony M. Palagonia, Bernadette Ann Pierson, Dennis Arthur Schmidt | 1997-07-29 |
| 5602051 | Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level | John K. DeBrosse, Hing Wong | 1997-02-11 |
| 5589707 | Multi-surfaced capacitor for storing more charge per horizontal chip area | — | 1996-12-31 |
| 5567653 | Process for aligning etch masks on an integrated circuit surface using electromagnetic energy | Claude L. Bertin, David J. Perlman | 1996-10-22 |
| 5567654 | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging | Kenneth E. Beilstein, Jr., Claude L. Bertin, Wayne J. Howell, James M. Leas, David J. Perlman | 1996-10-22 |
| 5556802 | Method of making corrugated vertical stack capacitor (CVSTC) | Paul E. Bakeman, Jr., Bomy Chen, Steven J. Holmes, Hing Wong | 1996-09-17 |
| 5549511 | Variable travel carrier device and method for planarizing semiconductor wafers | Matthew J. Rutten | 1996-08-27 |
| 5539240 | Planarized semiconductor structure with subminimum features | Howard S. Landis | 1996-07-23 |
| 5539255 | Semiconductor structure having self-aligned interconnection metallization formed from a single layer of metal | — | 1996-07-23 |
| 5539230 | Chimney capacitor | — | 1996-07-23 |
| 5532519 | Cube wireability enhancement with chip-to-chip alignment and thickness control | Claude L. Bertin, David J. Perlman | 1996-07-02 |
| 5530262 | Bidirectional field emission devices, storage structures and fabrication methods | Kent E. Morrett, Michael D. Potter, Matthew J. Rutten | 1996-06-25 |
| 5521434 | Semiconductor chip and electronic module with integrated surface interconnects/components | Stephen E. Luce, Steven H. Voldman | 1996-05-28 |
| 5517057 | Electronic modules with interconnected surface metallization layers | Kenneth E. Beilstein, Jr., Claude L. Bertin, Wayne J. Howell, James M. Leas, Robert B. Phillips | 1996-05-14 |
| 5496771 | Method of making overpass mask/insulator for local interconnects | Carter W. Kaanta, Randy W. Mann, Darrell Meulemans, Gordon Seth Starkey | 1996-03-05 |
| 5466636 | Method of forming borderless contacts using a removable mandrel | Carter W. Kaanta, Donald M. Kenney, Michael L. Kerbaugh, Howard S. Landis, Brian J. Machesney +3 more | 1995-11-14 |
| 5466634 | Electronic modules with interconnected surface metallization layers and fabrication methods therefore | Kenneth E. Beilstein, Jr., Claude L. Bertin, Wayne J. Howell, James M. Leas, Robert B. Phillips | 1995-11-14 |