Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6174763 | Three-dimensional SRAM trench structure and fabrication method therefor | Claude L. Bertin, John Cronin, Francis R. White | 2001-01-16 |
| 5923181 | Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module | Claude L. Bertin, Dennis Charles Dubois, Wayne J. Howell, Gordon A. Kelley, Jr., Christopher P. Miller +4 more | 1999-07-13 |
| 5920101 | Structure for making sub-lithographic images by the intersection of two spacers | Claude L. Bertin, James M. Leas, Jack A. Mandelman | 1999-07-06 |
| 5834818 | Structure for making sub-lithographic images by the intersection of two spacers | Claude L. Bertin, James M. Leas, Jack A. Mandelman | 1998-11-10 |
| 5804464 | Semiconductor chip kerf clear method for forming semiconductor chips and electronic module therefore | Claude L. Bertin, Timothy H. Daubenspeck, Wayne J. Howell | 1998-09-08 |
| 5786628 | Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module packaging | Claude L. Bertin, John Cronin, Wayne J. Howell, James M. Leas, David J. Perlman | 1998-07-28 |
| 5719438 | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging | Claude L. Bertin, John Cronin, Wayne J. Howell, James M. Leas, David J. Perlman | 1998-02-17 |
| 5714039 | Method for making sub-lithographic images by etching the intersection of two spacers | Claude L. Bertin, James M. Leas, Jack A. Mandelman | 1998-02-03 |
| 5686843 | Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module | Claude L. Bertin, Dennis Charles Dubois, Wayne J. Howell, Gordon A. Kelley, Jr., Christopher P. Miller +4 more | 1997-11-11 |
| 5670428 | Semiconductor chip kerf clear method and resultant semiconductor chip and electronic module formed from the same | Claude L. Bertin, Timothy H. Daubenspeck, Wayne J. Howell | 1997-09-23 |
| 5670803 | Three-dimensional SRAM trench structure and fabrication method therefor | Claude L. Bertin, John Cronin, Francis R. White | 1997-09-23 |
| 5644162 | Semiconductor chip having chip metal layer and transfer metal layer composed of same metal, and corresponding electronic module | Claude L. Bertin, Timothy H. Daubenspeck, Wayne J. Howell | 1997-07-01 |
| 5614277 | Monolithic electronic modules--fabrication and structures | Claude L. Bertin, Wayne J. Howell | 1997-03-25 |
| 5596226 | Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module | Claude L. Bertin, Timothy H. Daubenspeck, Wayne J. Howell | 1997-01-21 |
| 5567654 | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging | Claude L. Bertin, John Cronin, Wayne J. Howell, James M. Leas, David J. Perlman | 1996-10-22 |
| 5517754 | Fabrication processes for monolithic electronic modules | Claude L. Bertin, Wayne J. Howell | 1996-05-21 |
| 5517057 | Electronic modules with interconnected surface metallization layers | Claude L. Bertin, John Cronin, Wayne J. Howell, James M. Leas, Robert B. Phillips | 1996-05-14 |
| 5466634 | Electronic modules with interconnected surface metallization layers and fabrication methods therefore | Claude L. Bertin, John Cronin, Wayne J. Howell, James M. Leas, Robert B. Phillips | 1995-11-14 |
| 5426566 | Multichip integrated circuit packages and systems | Claude L. Bertin, Howard L. Kalter, Gordon A. Kelley, Jr., Christopher P. Miller, Dale E. Pontius +2 more | 1995-06-20 |
| 5309318 | Thermally enhanced semiconductor chip package | Claude L. Bertin, Gordon A. Kelley, Jr., Christopher P. Miller | 1994-05-03 |
| 5260952 | Fault tolerant logic system | John A. Fifield, Lawrence G. Heller, Hsing-San Lee, Charles H. Stapper | 1993-11-09 |
| 5096849 | Process for positioning a mask within a concave semiconductor structure | Claude L. Bertin, Francis R. White | 1992-03-17 |
| 5055898 | DRAM memory cell having a horizontal SOI transfer device disposed over a buried storage node and fabrication methods therefor | Claude L. Bertin, John R. Pessetto, Francis R. White | 1991-10-08 |
| RE32401 | Quaternary FET read only memory | Harish N. Kotecha | 1987-04-14 |
| 4276095 | Method of making a MOSFET device with reduced sensitivity of threshold voltage to source to substrate voltage variations | Harish N. Kotecha | 1981-06-30 |