Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6118318 | Self biased differential amplifier with hysteresis | John A. Fifield | 2000-09-12 |
| 5831452 | Leak tolerant low power dynamic circuits | Edward J. Nowak, Minh H. Tong | 1998-11-03 |
| 5675774 | "Circuit element on a single ended interconnection for generating a logical output finish/clock signal when detecting a state change to logical ""1 or 0""." | John A. Fifield | 1997-10-07 |
| 5550488 | Self timed driver | John A. Fifield | 1996-08-27 |
| 5260952 | Fault tolerant logic system | Kenneth E. Beilstein, Jr., John A. Fifield, Hsing-San Lee, Charles H. Stapper | 1993-11-09 |
| 4638482 | Random logic error detecting system for differential logic networks | William R. Griffin, Peter N. Horowitz | 1987-01-20 |
| 4591993 | Methodology for making logic circuits | William R. Griffin | 1986-05-27 |
| 4570084 | Clocked differential cascode voltage switch logic systems | William R. Griffin | 1986-02-11 |
| 4459609 | Charge-stabilized memory | John A. Fifield, Lloyd A. Walls | 1984-07-10 |
| 4358890 | Process for making a dual implanted drain extension for bucket brigade device tetrode structure | Harry J. Jones, Harish N. Kotecha, Donald A. Soderman | 1982-11-16 |
| 4300210 | Calibrated sensing system | Satya N. Chakravarti, Wilbur D. Pricer | 1981-11-10 |
| 4288864 | Serial-parallel-serial CCD memory system with fan out and fan in circuits | Thomas V. Harroun, Norbert G. Vogl | 1981-09-08 |
| 4282646 | Method of making a transistor array | Andres G. Fortino, Henry J. Geipel, Jr., Ronald Silverman | 1981-08-11 |
| 4246496 | Voltage-to-charge transducer | — | 1981-01-20 |
| 4230954 | Permanent or semipermanent charge transfer storage systems | — | 1980-10-28 |