Issued Patents All Time
Showing 26–50 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7487374 | Dynamic power and clock-gating method and circuitry with sleep mode based on estimated time for receipt of next wake-up signal | Ying Liu, Jente B. Kuang | 2009-02-03 |
| 7459950 | Pulsed local clock buffer (LCB) characterization ring oscillator | Jente B. Kuang, James D. Warnock, Dieter Wendel | 2008-12-02 |
| 7414904 | Method for evaluating storage cell design using a wordline timing and cell access detection circuit | Sebastian Ehrenreich, Jente B. Kuang, Chun-Tao Li | 2008-08-19 |
| 7408829 | Methods and arrangements for enhancing power management systems in integrated circuits | Jente B. Kuang | 2008-08-05 |
| 7372305 | Scannable dynamic logic latch circuit | Jente B. Kuang, James D. Warnock, Dieter Wendel | 2008-05-13 |
| 7349271 | Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance | Jente B. Kuang, Jerry Chang Jui Kao, Kevin John Nowka | 2008-03-25 |
| 7323908 | Cascaded pass-gate test circuit with interposed split-output drive devices | Ching-Te Chuang, Jente B. Kuang | 2008-01-29 |
| 7298176 | Dual-gate dynamic logic circuit with pre-charge keeper | Ching-Te Chuang, Keunwoo Kim, Jente B. Kuang, Kevin John Nowka | 2007-11-20 |
| 7288975 | Method and apparatus for fail-safe and restartable system clock generation | Gary Dale Carpenter, Fadi H. Gebara, Jente B. Kuang | 2007-10-30 |
| 7284029 | 4-to-2 carry save adder using limited switching dynamic logic | Wendy A. Belluomini, Ramyanshu Datta, Chandler McDowell, Robert K. Montoye | 2007-10-16 |
| 7276932 | Power-gating cell for virtual power rail control | Jente B. Kuang, Jethro C. Law, Kevin John Nowka | 2007-10-02 |
| 7272624 | Fused booth encoder multiplexer | Wendy A. Belluomini, Jun Sawada | 2007-09-18 |
| 7266707 | Dynamic leakage control circuit | Jente B. Kuang, Kevin John Nowka, Rajiv V. Joshi | 2007-09-04 |
| 7219244 | Control circuitry for power gating virtual power supply rails at differing voltage potentials | Jente B. Kuang, Kevin John Nowka | 2007-05-15 |
| 7216141 | Computing carry-in bit to most significant bit carry save adder in current stage | Wendy A. Belluomini, Ramyanshu Datta, Jente B. Kuang, Chandler McDowell, Robert K. Montoye | 2007-05-08 |
| 7202705 | Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control | Jente B. Kuang, Harmander Singh Deogun, AJ KleinOsowski | 2007-04-10 |
| 7193446 | Dynamic logic circuit incorporating reduced leakage state-retaining devices | Jente B. Kuang, Harmander Singh Deogun, AJ KleinOsowski | 2007-03-20 |
| 7142015 | Fast turn-off circuit for controlling leakage | Jente B. Kuang, Kevin John Nowka | 2006-11-28 |
| 7129754 | Controlled load limited switch dynamic logic circuitry | Jayakumaran Sivagnaname, Kevin John Nowka, Robert K. Montoye | 2006-10-31 |
| 7088154 | Methods and arrangements for a low power phase-locked loop | — | 2006-08-08 |
| 7061265 | Circuit for controlling leakage | Jente B. Kuang, Kevin John Nowka | 2006-06-13 |
| 7057432 | Low power high frequency phase detector | Seung-Moon Yoo | 2006-06-06 |
| 7046063 | Interface circuit for coupling between logic circuit domains | Jente B. Kuang, Kevin John Nowka | 2006-05-16 |
| 7002420 | Interleaved VCO with body voltage frequency range control | — | 2006-02-21 |
| 6980018 | Self limiting gate leakage driver | Jente B. Kuang, Kevin John Nowka | 2005-12-27 |