Issued Patents All Time
Showing 1–25 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9741731 | Three dimensional stacked semiconductor structure | Erh-Kun Lai | 2017-08-22 |
| 9536611 | 3D NAND memory using two separate SSL structures in an interlaced configuration for one bit line | Yi-Hsuan Hsiao | 2017-01-03 |
| 9461064 | Multi-layer memory array and manufacturing method of the same | Teng-Hao Yeh, Chih-Wei Hu | 2016-10-04 |
| 9431417 | Semiconductor structure and method for manufacturing the same | Erh-Kun Lai | 2016-08-30 |
| 9425191 | Memory device and manufacturing method of the same | Yi-Hsuan Hsiao, Shih-Hung Chen, Hang-Ting Lue | 2016-08-23 |
| 9419010 | High aspect ratio etching method | Chih-Ping Chen, Sheng-Chih Lai | 2016-08-16 |
| 9397209 | Semiconductor structure and manufacturing method of forming a large pattern and a plurality of fine gate lines located between the large patterns | Teng-Hao Yeh | 2016-07-19 |
| 9336867 | Phase change memory coding | Hsiang-Lan Lung, Ming-Hsiu Lee, Tien-Yen Wang, Chao-I Wu | 2016-05-10 |
| 9293348 | Semiconductor structure including stacked structure and method for forming the same | Erh-Kun Lai, Guan-Ru Lee | 2016-03-22 |
| 9281315 | Memory structure and method for manufacturing the same | Teng-Hao Yeh, Chih-Wei Hu | 2016-03-08 |
| 9252156 | Conductor structure and method | Yi-Hsuan Hsiao, Chih-Ping Chen | 2016-02-02 |
| 9245603 | Integrated circuit and operating method for the same | Teng-Hao Yeh, Hang-Ting Lue, Chih-Chang Hsieh, Chih-Wei Hu | 2016-01-26 |
| 9246015 | Vertical channel transistor structure and manufacturing method thereof | Tzu-Hsuan Hsu, Chia-Wei Wu | 2016-01-26 |
| 9224750 | Multi-layer memory array and manufacturing method of the same | Teng-Hao Yeh, Chih-Wei Hu | 2015-12-29 |
| 9196315 | Three dimensional gate structures with horizontal extensions | Teng-Hao Yeh, Yan-Ru Chen | 2015-11-24 |
| 9136277 | Three dimensional stacked semiconductor structure and method for manufacturing the same | Erh-Kun Lai | 2015-09-15 |
| 9123778 | Damascene conductor for 3D array | Erh-Kun Lai, Guanru Lee | 2015-09-01 |
| 9099538 | Conductor with a plurality of vertical extensions for a 3D device | Hang-Ting Lue | 2015-08-04 |
| 9082656 | NAND flash with non-trapping switch transistors | Shih-Hung Chen, Hang-Ting Lue | 2015-07-14 |
| 9082657 | Semiconductor structure and method for manufacturing the same | Chih-Wei Hu, Teng-Hao Yeh | 2015-07-14 |
| 9076535 | Array arrangement including carrier source | Chih-Wei Hu, Teng-Hao Yeh | 2015-07-07 |
| 9035369 | Semiconductor structure and manufacturing method of the same | Shih-Hung Chen, Hang-Ting Lue | 2015-05-19 |
| 9019771 | Dielectric charge trapping memory cells with redundancy | Hsiang-Lan Lung, Erh-Kun Lai, Ming-Hsiu Lee | 2015-04-28 |
| 8987914 | Conductor structure and method | Yi-Hsuan Hsiao, Chih-Ping Chen | 2015-03-24 |
| 8987098 | Damascene word line | Shih-Hung Chen, Hang-Ting Lue | 2015-03-24 |