Issued Patents All Time
Showing 51–75 of 472 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10649853 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Naresh Nayar, Geraint North, Hugh Shen, William J. Starke, Phillip G. Williams | 2020-05-12 |
| 10642760 | Techniques for command arbitation in symmetric multiprocessor systems | Charles F. Marino, Praveen S. Reddy | 2020-05-05 |
| 10635766 | Simulation employing level-dependent multitype events | Hugh Shen, Derek E. Williams | 2020-04-28 |
| 10613980 | Coherence protocol providing speculative coherence response to directory probe | David J. Krolak, Michael S. Siegel, Derek E. Williams | 2020-04-07 |
| 10613979 | Accelerator memory coherency with single state machine | Kenneth M. Valk, Derek E. Williams, Michael S. Siegel, John D. Irish | 2020-04-07 |
| 10613792 | Efficient enforcement of barriers with respect to memory move sequences | Bradly G. Frey, Cathy May, William J. Starke, Derek E. Williams | 2020-04-07 |
| 10579527 | Remote node broadcast of requests in a multinode data processing system | Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli, Derek E. Williams | 2020-03-03 |
| 10572179 | Speculatively performing memory move requests with respect to a barrier | Derek E. Williams | 2020-02-25 |
| 10489293 | Information handling system with immediate scheduling of load operations | Sanjeev Ghai, Stephen J. Powell, William J. Starke | 2019-11-26 |
| 10437725 | Master requesting missing segments of a cache line for which the master has coherence ownership | Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli | 2019-10-08 |
| 10423550 | Managing efficient selection of a particular processor thread for handling an interrupt | Richard Louis Arndt, Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Michael S. Siegel +1 more | 2019-09-24 |
| 10394566 | Banked cache temporarily favoring selection of store requests from one of multiple store queues | Sanjeev Ghai, Hugh Shen, Derek E. Williams | 2019-08-27 |
| 10394567 | Temporarily favoring selection of store requests from one of multiple store queues for issuance to a bank of a banked cache | Sanjeev Ghai, Hugh Shen, Derek E. Williams | 2019-08-27 |
| 10394636 | Techniques for managing a hang condition in a data processing system with shared memory | Charles F. Marino, Praveen S. Reddy, Michael S. Siegel | 2019-08-27 |
| 10379856 | Multicopy atomic store operation in a data processing system | Derek E. Williams | 2019-08-13 |
| 10380031 | Ensuring forward progress for nested translations in a memory management unit | Jody B. Joyner, Jon K. Kriegel, Bradley Nelson, Charles D. Wait | 2019-08-13 |
| 10346255 | Method for flagging data modification during a virtual machine backup | Naresh Nayar, Geraint North, Hugh Shen, William J. Starke, Phillip G. Williams | 2019-07-09 |
| 10339009 | System for flagging data modification during a virtual machine backup | Naresh Nayar, Geraint North, Hugh Shen, William J. Starke, Phillip G. Williams | 2019-07-02 |
| 10331563 | Adaptively enabling and disabling snooping bus commands | Hien Minh Le, Hugh Shen, Derek E. Williams, Phillip G. Williams | 2019-06-25 |
| 10331373 | Migration of memory move instruction sequences between hardware threads | William J. Starke, Derek E. Williams | 2019-06-25 |
| 10318435 | Ensuring forward progress for nested translations in a memory management unit | Jody B. Joyner, Jon K. Kriegel, Bradley Nelson, Charles D. Wait | 2019-06-11 |
| 10318432 | Implementing barriers to efficiently support cumulativity in a weakly ordered memory system | Hugh Shen, Derek E. Williams | 2019-06-11 |
| 10241945 | Memory move supporting speculative acquisition of source and destination data granules including copy-type and paste-type instructions | Derek E. Williams | 2019-03-26 |
| 10235215 | Memory lock mechanism for a multiprocessor system | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, William J. Starke | 2019-03-19 |
| 10216519 | Multicopy atomic store operation in a data processing system | Derek E. Williams | 2019-02-26 |