Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10601441 | Efficient software closing of hardware-generated encoding context | Anthony T. Sofia, Jonathan D. Bradbury, Matthias Klein | 2020-03-24 |
| 10521351 | Temporarily suppressing processing of a restrained storage operand request | Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt, Chung-Lung K. Shum | 2019-12-31 |
| 10333548 | Efficient software closing of hardware-generated encoding context | Anthony T. Sofia, Jonathan D. Bradbury, Matthias Klein | 2019-06-25 |
| 10303575 | Time-slice-instrumentation facility | Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt | 2019-05-28 |
| 9164761 | Obtaining data in a pipelined processor | Aaron Tsai, Chung-Lung K. Shum, Scott Barnett Swaney | 2015-10-20 |
| 9135005 | History and alignment based cracking for store multiple instructions for optimizing operand store compare penalties | Khary J. Alexander, Fadi Y. Busaba, Brian W. Curran, Christian Jacobi, James R. Mitchell | 2015-09-15 |
| 9075600 | Program status word dependency handling in an out of order microprocessor design | Gregory W. Alexander, Brian D. Barrick, Michael Billeci, Fadi Y. Busaba, David A. Schroter | 2015-07-07 |
| 8938605 | Instruction cracking based on machine state | Fadi Y. Busaba, David S. Hutton, Eric M. Schwarz | 2015-01-20 |
| 8645669 | Cracking destructively overlapping operands in variable length instructions | Khary J. Alexander, Fadi Y. Busaba, Brian W. Curran, Christian Jacobi | 2014-02-04 |
| 8516228 | Supporting partial recycle in a pipelined microprocessor | Khary J. Alexander, Michael Billeci, Fadi Y. Busaba | 2013-08-20 |
| 8495341 | Instruction length based cracking for instruction of variable length storage operands | Fadi Y. Busaba, Brian W. Curran, Christian Jacobi, Wen H. Li | 2013-07-23 |
| 8464030 | Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits | Fadi Y. Busaba, Brian W. Curran, Lee Evan Eisen, David S. Hutton | 2013-06-11 |
| 8407453 | Facilitating processing in a computing environment using an extended drain instruction | Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Timothy J. Slegel, Charles F. Webb | 2013-03-26 |
| 8250440 | Address generation checking | Fadi Y. Busaba | 2012-08-21 |
| 8201067 | Processor error checking for instruction data | Fadi Y. Busaba, Khary J. Alexander, Michael Billeci, Vimal M. Kapadia | 2012-06-12 |
| 8195924 | Early instruction text based operand store compare reject avoidance | Khary J. Alexander, Fadi Y. Basuba, David S. Hutton, Chung-Lung K. Shum | 2012-06-05 |
| 8176301 | Millicode assist instructions for millicode store access exception checking | Mark S. Farrell, Chung-Lung K. Shum | 2012-05-08 |
| 8090933 | Methods computer program products and systems for unifying program event recording for branches and stores in the same dataflow | Fadi Y. Busaba | 2012-01-03 |
| 8078843 | Facilitating processing in a computing environment using an extended drain instruction | Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Timothy J. Slegel, Charles F. Webb | 2011-12-13 |
| 7975130 | Method and system for early instruction text based operand store compare reject avoidance | Khary J. Alexander, Fadi Y. Busada, David S. Hutton, Chung-Lung K. Shum | 2011-07-05 |
| 7966474 | System, method and computer program product for translating storage elements | Chung-Lung K. Shum, Fadi Y. Busaba, Mark S. Farrell, Bernd Nerz, David A. Schroter +1 more | 2011-06-21 |
| 7921279 | Operand and result forwarding between differently sized operands in a superscalar processor | David S. Hutton, Fadi Y. Busaba, Christopher A. Krygowski, Edward T. Malley, Jeffrey S. Plate +3 more | 2011-04-05 |
| 7913067 | Method and system for overlapping execution of instructions through non-uniform execution pipelines in an in-order processor | David S. Hutton, Khary J. Alexander, Fadi Y. Busaba, John G. Rell, Jr., Eric M. Schwarz +1 more | 2011-03-22 |
| 7861064 | Method, system, and computer program product for selectively accelerating early instruction processing | Khary J. Alexander, Fadi Y. Busaba, David S. Hutton, Chung-Lung K. Shum | 2010-12-28 |
| 6751708 | Method for ensuring that a line is present in an instruction cache | John S. Liptay, Mark A. Check, Mark S. Farrell, Charles F. Webb | 2004-06-15 |