Issued Patents All Time
Showing 126–150 of 226 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10037981 | Integrated display system with multi-color light emitting diodes (LEDs) | Srinivasa Banna, Sanjay Jha, Deepak Nayak | 2018-07-31 |
| 10026659 | Methods of forming fin isolation regions under tensile-strained fins on FinFET semiconductor devices | Murat Kerem Akarvardar, Jody A. Fronheiser | 2018-07-17 |
| 9972537 | Methods of forming graphene contacts on source/drain regions of FinFET devices | — | 2018-05-15 |
| 9960257 | Common fabrication of multiple FinFETs with different channel heights | Murat Kerem Akarvardar, Jody A. Fronheiser | 2018-05-01 |
| 9954104 | Multiwidth finFET with channel cladding | Ruilong Xie | 2018-04-24 |
| 9953882 | Method for forming nanowires including multiple integrated devices with alternate channel materials | — | 2018-04-24 |
| 9941330 | LEDs with three color RGB pixels for displays | Srinivasa Banna, Deepak Nayak | 2018-04-10 |
| 9941329 | Light emitting diodes (LEDs) with integrated CMOS circuits | Deepak Nayak, Srinivasa Banna | 2018-04-10 |
| 9864136 | Non-planar monolithic hybrid optoelectronic structures and methods | — | 2018-01-09 |
| 9865682 | Directed self-assembly material etch mask for forming vertical nanowires | Steven Bentley, Richard A. Farrell, Gerard Schmid | 2018-01-09 |
| 9864132 | Silicon waveguide devices in integrated photonics | Roderick A. Augur, Steven M. Shank | 2018-01-09 |
| 9842897 | Bulk finFET with partial dielectric isolation featuring a punch-through stopping layer under the oxide | Murat Kerem Akarvardar | 2017-12-12 |
| 9831131 | Method for forming nanowires including multiple integrated devices with alternate channel materials | — | 2017-11-28 |
| 9824935 | Methods of forming NMOS and PMOS FinFET devices and the resulting product | — | 2017-11-21 |
| 9812393 | Programmable via devices with metal/semiconductor via links and fabrication methods thereof | Suraj K. Patil, Min-hwa Chi | 2017-11-07 |
| 9799767 | Methods of forming PMOS and NMOS FinFET devices on CMOS based integrated circuit products | — | 2017-10-24 |
| 9754843 | Heterogeneous integration of 3D Si and III-V vertical nanowire structures for mixed signal circuits fabrication | Suraj K. Patil | 2017-09-05 |
| 9754903 | Semiconductor structure with anti-efuse device | Suraj K. Patil, Min-hwa Chi | 2017-09-05 |
| 9748387 | Methods of forming PMOS FinFET devices and multiple NMOS FinFET devices with different performance characteristics | — | 2017-08-29 |
| 9741622 | Methods of forming NMOS and PMOS FinFET devices and the resulting product | — | 2017-08-22 |
| 9716174 | Electrical isolation of FinFET active region by selective oxidation of sacrificial layer | Murat Kerem Akarvardar, Jody A. Fronheiser | 2017-07-25 |
| 9698025 | Directed self-assembly material growth mask for forming vertical nanowires | Steven Bentley, Richard A. Farrell, Gerard Schmid | 2017-07-04 |
| 9691497 | Programmable devices with current-facilitated migration and fabrication methods | Suraj K. Patil, Min-hwa Chi | 2017-06-27 |
| 9673083 | Methods of forming fin isolation regions on FinFET semiconductor devices by implantation of an oxidation-retarding material | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz, Kern Rim | 2017-06-06 |
| 9673222 | Fin isolation structures facilitating different fin isolation schemes | Kangguo Cheng, Bruce B. Doris, Nicolas Loubet, Prasanna Khare, Rama Divakaruni | 2017-06-06 |