Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12300583 | Concealed gate terminal semiconductor packages and related methods | Erwin Ian V. Almagro, Maria Clemens Y. Quinones, Maria Cristina Estacio, Elsie Agdon Cabahug | 2025-05-13 |
| 12087677 | Molded packaging for wide band gap semiconductor devices | Maria Clemens Y. Quinones, Bigildis Dosdos, Jerome Teysseyre, Erwin Ian V. Almagro | 2024-09-10 |
| 12051635 | Semiconductor device package with clip interconnect and dual side cooling | Maria Cristina Estacio, Elsie Agdon Cabahug | 2024-07-30 |
| 11791247 | Concealed gate terminal semiconductor packages and related methods | Erwin Ian V. Almagro, Maria Clemens Y. Quinones, Maria Cristina Estacio, Elsie Agdon Cabahug | 2023-10-17 |
| 11735508 | Vertical and horizontal circuit assemblies | Jerome Teysseyre, Chung-Lin Wu, Bigildis Dosdos, Erwin Ian V. Almagro, Maria Cristina Estacio | 2023-08-22 |
| 11296069 | Substrate interposer on a leaderframe | Elsie Agdon Cabahug, Marie Clemens Ypil Quinones, Maria Cristina Estacio, Chung-Lin Wu, Jerome Teysseyre | 2022-04-05 |
| 11177203 | Vertical and horizontal circuit assemblies | Jerome Teysseyre, Chung-Lin Wu, Bigildis Dosdos, Erwin Ian V. Almagro, Maria Cristina Estacio | 2021-11-16 |
| 11088046 | Semiconductor device package with clip interconnect and dual side cooling | Maria Cristina Estacio, Elsie Agdon Cabahug | 2021-08-10 |
| 10546847 | Substrate interposer on a leadframe | Elsie Agdon Cabahug, Marie Clemens Ypil Quinones, Maria Cristina Estacio, Chung-Lin Wu, Jerome Teysseyre | 2020-01-28 |
| 10256178 | Vertical and horizontal circuit assemblies | Jerome Teysseyre, Chung-Lin Wu, Bigildis Dosdos, Erwin Ian V. Almagro, Maria Cristina Estacio | 2019-04-09 |
| 9698143 | Wireless module with active devices | Allan Tungul Flores | 2017-07-04 |
| 8624393 | Methods and designs for localized wafer thinning | Suku Kim, James J. Murphy, Matthew Reynolds, Jan Vincent C. Mancelita, Michael D. Gruenhagen | 2014-01-07 |
| 8158506 | Methods and designs for localized wafer thinning | Suku Kim, James J. Murphy, Michael D. Gruenhagen, Matthew Reynolds, Jan Vincent C. Mancelita | 2012-04-17 |
| 7906837 | Robust leaded molded packages and methods for forming the same | Elsie Agdon Cabahug, Marvin Gestole, Margie Sebial Tumulak-Rios, Lilith U. Montayre | 2011-03-15 |
| 7816178 | Packaged semiconductor device with dual exposed surfaces and method of manufacturing | Ruben Madrid | 2010-10-19 |
| 7816784 | Power quad flat no-lead semiconductor die packages with isolated heat sink for high-voltage, high-power applications, systems using the same, and methods of making the same | Joon-seo Son, Armand Vincent C. Jereza | 2010-10-19 |
| 7586178 | Alternative flip chip in leaded molded package design and method for manufacture | — | 2009-09-08 |
| 7582956 | Flip chip in leaded molded package and method of manufacture thereof | Rajeev Joshi, Consuelo Tangpuz | 2009-09-01 |
| 7576429 | Packaged semiconductor device with dual exposed surfaces and method of manufacturing | Ruben Madrid | 2009-08-18 |
| 7560311 | Robust leaded molded packages and methods for forming the same | Elsie Agdon Cabahug, Marvin Gestole, Margie Sebial Tumulak-Rios, Lilith U. Montayre | 2009-07-14 |
| 7256479 | Method to manufacture a universal footprint for a package with exposed chip | Jonathan Almeria Noquil, Connie Tangpuz, Stephen R. Martin, Rajeev Joshi, Venkat Iyer | 2007-08-14 |
| 7217594 | Alternative flip chip in leaded molded package design and method for manufacture | — | 2007-05-15 |
| 7215011 | Flip chip in leaded molded package and method of manufacture thereof | Rajeev Joshi, Consuelo Tangpuz | 2007-05-08 |
| 7154168 | Flip chip in leaded molded package and method of manufacture thereof | Rajeev Joshi, Consuelo Tangpuz | 2006-12-26 |
| 7122884 | Robust leaded molded packages and methods for forming the same | Elsie Agdon Cabahug, Marvin Gestole, Margie Sebial Tumulak-Rios, Lilith U. Montayre | 2006-10-17 |