Issued Patents All Time
Showing 25 most recent of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11430722 | Integration of a passive component in a cavity of an integrated circuit package | Jeffrey Anthony Morroni, Sreenivasan K. Koduri, Sujan Kundapur Manohar, Yogesh Kumar Ramadass, Anindya Poddar | 2022-08-30 |
| 11257739 | Semiconductor package with integrated passive electrical component | Joyce Marie Mullenix, Roberto Giampiero Massolini | 2022-02-22 |
| 10734313 | Integration of a passive component in an integrated circuit package | Jeffrey Anthony Morroni, Sreenivasan K. Koduri, Sujan Kundapur Manohar, Yogesh Kumar Ramadass, Anindya Poddar | 2020-08-04 |
| 10714412 | Semiconductor package with integrated passive electrical component | Joyce Marie Mullenix, Roberto Giampiero Massolini | 2020-07-14 |
| 10573582 | Semiconductor systems having dual leadframes | Hau Nguyen, Anindya Poddar, Ken Pham | 2020-02-25 |
| 10573585 | Power converter having a conductive clip | Jie Mao | 2020-02-25 |
| 10312184 | Semiconductor systems having premolded dual leadframes | Hau Nguyen, Anindya Poddar, Ken Pham | 2019-06-04 |
| 9468087 | Power module with improved cooling and method for making | — | 2016-10-11 |
| 9355946 | Converter having partially thinned leadframe with stacked chips and interposer, free of wires and clips | — | 2016-05-31 |
| 9159656 | Semiconductor die package and method for making the same | Oseob Jeon, Yoonhwa Choi, Boon Huan Gooi, Maria Cristina Estacio, David Chong +6 more | 2015-10-13 |
| 9136256 | Converter having partially thinned leadframe with stacked chips and interposer, free of wires and clips | — | 2015-09-15 |
| 9053853 | Method of forming a magnetics package | — | 2015-06-09 |
| 8679896 | DC/DC converter power module package incorporating a stacked controller and construction methodology | Jaime A. Bayan, Ashok S. Prabhu | 2014-03-25 |
| 8664752 | Semiconductor die package and method for making the same | Oseob Jeon, Yoonhwa Choi, Boon Huan Gooi, Maria Cristina Estacio, David Chong +6 more | 2014-03-04 |
| 8609978 | Leadframe based photo voltaic electronic assembly | — | 2013-12-17 |
| 8541890 | Substrate based unmolded package | — | 2013-09-24 |
| 8524532 | Integrated circuit package including an embedded power stage wherein a first field effect transistor (FET) and a second FET are electrically coupled therein | — | 2013-09-03 |
| 8339231 | Leadframe based magnetics package | — | 2012-12-25 |
| 8278742 | Thermal enhanced upper and dual heat sink exposed molded leadless package and method | Chung-Lin Wu | 2012-10-02 |
| 8212361 | Semiconductor die package including multiple dies and a common node structure | Venkat Iyer, Jonathan Klein | 2012-07-03 |
| 8183088 | Semiconductor die package and method for making the same | Oseob Jeon, Yoonhwa Choi, Boon Huan Gooi, Maria Cristina Estacio, Chung-Lin Wu +2 more | 2012-05-22 |
| 7971350 | Method of providing a RF shield of an electronic device | — | 2011-07-05 |
| 7968982 | Thermal enhanced upper and dual heat sink exposed molded leadless package | Chung-Lin Wu | 2011-06-28 |
| 7932171 | Dual metal stud bumping for flip chip applications | Consuelo Tangpuz, Margie T. Rios, Erwin Victor Cruz | 2011-04-26 |
| 7892884 | High performance multi-chip flip chip package | — | 2011-02-22 |