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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MK

Marcos Karnezos — 68 Patents

CHChippac: 43 patents #1 of 42Top 3%
SCStats Chippac: 13 patents #84 of 425Top 20%
SISignetics: 3 patents #5 of 93Top 6%
HP: 3 patents #5,824 of 7,018Top 85%
A-A-Sat: 2 patents #19 of 49Top 40%
VAVarian: 1 patents #283 of 684Top 45%
Palo Alto, CA: #220 of 9,675 inventorsTop 3%
California: #4,714 of 386,348 inventorsTop 2%
Overall (All Time): #30,786 of 4,157,543Top 1%
68 Patents All Time
Marcos Karnezos has been granted 68 US patents while listed as an inventor at Chippac. The first was granted in 1986 and the most recent in March 2015. Marcos Karnezos ranks #30,786 of 4,157,543 US inventors in our database (top 0.74%). Patent records list Marcos Karnezos in Palo Alto, CA, US.

Patents per Year

Patents granted per year, 1986 to 2015Bar chart with a peak of 10 patents in 2007.peak 101986: 1 patents19861989: 2 patents1991: 1 patents19911995: 2 patents1998: 1 patents19982000: 1 patents2001: 2 patents20012002: 2 patents2003: 2 patents20032004: 1 patents2005: 5 patents20052006: 9 patents2007: 10 patents20072008: 7 patents2009: 4 patents20092010: 9 patents2011: 4 patents20112012: 1 patents2013: 2 patents20132015: 2 patents2015

Issued Patents All Time

Showing 1–25 of 68 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8994162 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package 2015-03-31
8970049 Multiple chip package module having inverted package stacked over die 2015-03-03
8552551 Adhesive/spacer island structure for stacking over wire bonded die Sang Ho Lee, Jong Wook Ju, Hyeog Chan Kwon 2013-10-08
8410596 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package 2013-04-02
8143100 Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages 2012-03-27
8030134 Stacked semiconductor package having adhesive/spacer structure and insulation Hyeog Chan Kwon 2011-10-04
8030756 Plastic ball grid array package with integral heatsink TaeKeun Lee, Flynn Carson 2011-10-04
7935572 Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages 2011-05-03
7923822 Integrated circuit package system including shield 2011-04-12
7829382 Method for making semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package Flynn Carson, Youngcheol Kim 2010-11-09
7749807 Method of fabricating a semiconductor multipackage module including a processor and memory package assemblies 2010-07-06
7736950 Flip chip interconnection Rajendra D. Pendse, Kyung-Moon Kim, Koo Hong Lee, Moon Hee Lee, Orion K. Starr 2010-06-15
7732254 Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages 2010-06-08
7728417 Integrated circuit package system including shield 2010-06-01
7692279 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package Flynn Carson, Youngcheol Kim 2010-04-06
7687313 Method of fabricating a semiconductor multi package module having an inverted package stacked over ball grid array (BGA) package 2010-03-30
7682873 Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages 2010-03-23
7645634 Method of fabricating module having stacked chip scale semiconductor packages 2010-01-12
7638363 Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages 2009-12-29
7589407 Semiconductor multipackage module including tape substrate land grid array package stacked over ball grid array package 2009-09-15
7582960 Multiple chip package module including die stacked over encapsulated package 2009-09-01
7494847 Method for making a semiconductor multi-package module having inverted wire bond carrier second package Flynn Carson 2009-02-24
7429786 Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides Flynn Carson 2008-09-30
7429787 Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow 2008-09-30
7394148 Module having stacked chip scale semiconductor packages 2008-07-01