Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11842130 | Model-based simulation result predictor for circuit design | Saleha Khatun, David Varghese | 2023-12-12 |
| 10635770 | Methods, systems, and computer program products for implementing an electronic design with hybrid analysis techniques | Xiaohai Wu, Tao Hu, Walter J. Ghijsen, Yujia Li, An-Chang Deng | 2020-04-28 |
| 10515177 | Method, system, and computer program product for implementing routing aware placement or floor planning for an electronic design | Henry Yu, Joshua Baudhuin | 2019-12-24 |
| 10346573 | Method and system for performing incremental post layout simulation with layout edits | Karun Sharma, Arnold Ginetti, Srihari Cidambi Sampath | 2019-07-09 |
| 10296695 | Method, system, and computer program product for implementing track patterns for electronic circuit designs | Yinnie Lee, Jeffrey Markham, Karun Sharma | 2019-05-21 |
| 10049175 | Methods, systems, and articles of manufacture for interactively implementing physical electronic designs with track patterns | Jeffrey S. Salowe, Min Cao, Jeffrey Markham | 2018-08-14 |
| 9904756 | Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with lateral fills in electronic designs | Alexandre Arkhipov, Giles V. Powell, Karun Sharma | 2018-02-27 |
| 9659138 | Methods, systems, and computer program product for a bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic techniques | Giles V. Powell, Alexandre Arkhipov, Karun Sharma | 2017-05-23 |
| 9652579 | Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with parallel fills in electronic designs | Alexandre Arkhipov, Giles V. Powell, Karun Sharma | 2017-05-16 |
| 9396301 | Method, system, and computer program product for interconnecting circuit components with track patterns for electronic circuit designs | Yinnie Lee, Jeffrey Markham, Karun Sharma | 2016-07-19 |
| 9372955 | Method, system, and computer program product for implementing repetitive track patterns for electronic circuit designs | Yinnie Lee, Jeffrey Markham, Karun Sharma | 2016-06-21 |
| 9164969 | Method and system for implementing a stream reader for EDA tools | Udayan Gumaste, Jeffrey Markham | 2015-10-20 |
| 9117052 | Methods, systems, and articles of manufacture for interactively implementing physical electronic designs with track patterns | Jeffrey S. Salowe, Min Cao, Jeffrey Markham | 2015-08-25 |
| 9064063 | Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints | Henry Yu, Joshua Baudhuin, Regis Colwell, Harsh Deshmane, Elias Lee Fallon +8 more | 2015-06-23 |
| 8807948 | System and method for automated real-time design checking | Wilbur Luo, Olivier Pribetich, Olivier Omedes, Ya-Chieh Lai, Frank E. Gennari | 2014-08-19 |
| 8739095 | Method, system, and program product for interactive checking for double pattern lithography violations | Min Cao | 2014-05-27 |
| 8694943 | Methods, systems, and computer program product for implementing electronic designs with connectivity and constraint awareness | Henry Yu, Elias Lee Fallon, Regis Colwell, Joshua Baudhuin, Hui Xu +8 more | 2014-04-08 |
| 8645902 | Methods, systems, and computer program products for implementing interactive coloring of physical design components in a physical electronic design with multiple-patterning techniques awareness | Henry Yu, Jeffrey Markham, Min Cao | 2014-02-04 |
| 8516404 | Methods, systems, and articles of manufacture for implementing constraint checking windows for an electronic design for multiple-patterning lithography processes | Min Cao, Gilles S. C. Lamant | 2013-08-20 |
| 8473874 | Method and apparatus for automatically fixing double patterning loop violations | Karun Sharma, Min Cao | 2013-06-25 |
| 8448096 | Method and system for parallel processing of IC design layouts | Xiaojun Wang, Li Ma, Mathew Koshy, Tianhao Zhang, Udayan Gumaste +4 more | 2013-05-21 |
| 7984399 | System and method for random defect yield simulation of chip with built-in redundancy | Mathew Koshy, Jonathan R. Fales, Udayan Gumaste | 2011-07-19 |
| 7904852 | Method and system for implementing parallel processing of electronic design automation tools | Eitan Cadouri, Krzysztof A. Kozminski, Haifang Liao, Kenneth Mednick, Mark A. Snowden | 2011-03-08 |
| 7886243 | System and method for using rules-based analysis to enhance models-based analysis | Udayan Gumaste, Mathew Koshy, Harsh Deshmane | 2011-02-08 |
| 7725845 | System and method for layout optimization using model-based verification | David White, Eric Nequist | 2010-05-25 |