| 12142528 |
3D chip with shared clock distribution network |
Javier A. Delacruz, Steven Teig, Ilyas Mohammed |
2024-11-12 |
|
| 11557516 |
3D chip with shared clock distribution network |
Javier A. Delacruz, Steven Teig, Ilyas Mohammed |
2023-01-17 |
|
| 11157670 |
Systems and methods for inter-die block level design |
Javier A. Delacruz, Jung Ko, Kenneth Duong |
2021-10-26 |
|
| 10892252 |
Face-to-face mounted IC dies with orthogonal top interconnect layers |
Steven Teig, Javier A. Delacruz, Ilyas Mohammed, Laura Mirkarimi |
2021-01-12 |
|
| 10672663 |
3D chip sharing power circuit |
Javier A. Delacruz, Steven Teig, Ilyas Mohammed |
2020-06-02 |
|
| 10664564 |
Systems and methods for inter-die block level design |
Javier A. Delacruz, Jung Ko, Kenneth Duong |
2020-05-26 |
|
| 10586786 |
3D chip sharing clock interconnect layer |
Javier A. Delacruz, Steven Teig, Ilyas Mohammed |
2020-03-10 |
|
| 10580757 |
Face-to-face mounted IC dies with orthogonal top interconnect layers |
Steven Teig, Javier A. Delacruz, Ilyas Mohammed, Laura Mirkarimi |
2020-03-03 |
|
| 8717182 |
Mechanism and method to implement a reader mechanism for a container-based monitor of a consumable product |
Richard Brashears, Robert L. Brashears, Greg C. Buchner, David Cross |
2014-05-06 |
|
| 8635574 |
Method and mechanism for implementing extraction for an integrated circuit design |
Richard Brashears, Matthew A. Liberty, Michael McSherry |
2014-01-21 |
$20,171,000 |
| 8631363 |
Method and mechanism for identifying and tracking shape connectivity |
— |
2014-01-14 |
$5,210,000 |
| 8438512 |
Method and system for implementing efficient locking to facilitate parallel processing of IC designs |
David A. Cross |
2013-05-07 |
$1,951,000 |
| 8392864 |
Method and system for model-based routing of an integrated circuit |
David White |
2013-03-05 |
$8,356,000 |
| 8386975 |
Method, system, and computer program product for improved electrical analysis |
David White, Matthew A. Liberty, Michael McSherry |
2013-02-26 |
$1,904,000 |
| 8375342 |
Method and mechanism for implementing extraction for an integrated circuit design |
Richard Brashears, Matthew A. Liberty, Michael McSherry |
2013-02-12 |
$3,204,000 |
| 8316331 |
Method and mechanism for implementing extraction for an integrated circuit design |
Richard Brashears, Matthew A. Liberty, Michael McSherry |
2012-11-20 |
$2,479,000 |
| 8136060 |
Method and mechanism for identifying and tracking shape connectivity |
— |
2012-03-13 |
$6,600,000 |
| 8069426 |
Method and mechanism for identifying and tracking shape connectivity |
— |
2011-11-29 |
$3,939,000 |
| 8010917 |
Method and system for implementing efficient locking to facilitate parallel processing of IC designs |
David A. Cross |
2011-08-30 |
$7,226,000 |
| 7971173 |
Method and system for implementing partial reconfiguration and rip-up of routing |
Richard Brashears |
2011-06-28 |
$3,765,000 |
| 7904862 |
Method and mechanism for performing clearance-based zoning |
— |
2011-03-08 |
$2,601,000 |
| 7870517 |
Method and mechanism for implementing extraction for an integrated circuit design |
Richard Brashears, Matthew A. Liberty, Michael McSherry |
2011-01-11 |
$3,134,000 |
| 7861203 |
Method and system for model-based routing of an integrated circuit |
David White |
2010-12-28 |
$4,071,000 |
| 7725845 |
System and method for layout optimization using model-based verification |
David White, Roland Ruehl |
2010-05-25 |
$4,534,000 |
| 7721235 |
Method and system for implementing edge optimization on an integrated circuit design |
Richard Brashears |
2010-05-18 |
$3,367,000 |