EF

Elias Lee Fallon

CS Cadence Design Systems: 19 patents #45 of 2,263Top 2%
📍 Washington, PA: #23 of 552 inventorsTop 5%
🗺 Pennsylvania: #3,390 of 74,527 inventorsTop 5%
Overall (All Time): #218,311 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDate
12045730 System, method, and computer program product for analog and mix-signal circuit placement David White, Regis Colwell, Hongzhou Liu, Hui Xu, Wangyang Zhang +2 more 2024-07-23
11620548 System, method, and computer program product for predicting parasitics in an electronic design Sai Bhushan, Chirag Ahuja 2023-04-04
11562110 System and method for device mismatch contribution computation for non-continuous circuit outputs Wangyang Zhang, Hongzhou Liu, Hua Luo 2023-01-24
11544574 System, method, and computer program product for analog structure prediction associated with an electronic design Wangyang Zhang 2023-01-03
11275881 System, method, and computer program product for genetic routing in an electronic circuit design Weifu Li, Supriya Ananthram, Weiyi Qi, Sheng Qian 2022-03-15
11275882 System, method, and computer program product for group and isolation prediction using machine learning and applications in analog placement and sizing Wangyang Zhang, Regis Colwell, Hua Luo, Namita Bhushan Rane 2022-03-15
11087060 System, method, and computer program product for the integration of machine learning predictors in an automatic placement associated with an electronic design Wangyang Zhang, Regis Colwell, Hua Luo, Namita Bhushan Rane, Sheng Qian 2021-08-10
11048852 System, method and computer program product for automatic generation of sizing constraints by reusing existing electronic designs Wangyang Zhang, Sheng Qian 2021-06-29
11003825 System, method, and computer program product for optimization in an electronic design Saleha Khatun, Sheng Qian, Wangyang Zhang 2021-05-11
10699051 Method and system for performing cross-validation for model-based layout recommendations Wangyang Zhang, Regis Colwell, Hua Luo, Namita Bhushan Rane 2020-06-30
10628546 Method and system for automatically extracting layout design patterns for custom layout design reuse through interactive recommendations Regis Colwell, Wangyang Zhang, David White, José Ángel Martinez, Rong Yan 2020-04-21
9298871 Method and system for implementing translations of parameterized cells 2016-03-29
9064063 Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints Henry Yu, Joshua Baudhuin, Regis Colwell, Harsh Deshmane, Sanjib Ghosh +8 more 2015-06-23
8732640 Methods, systems, and articles for multi-scenario physically-aware design methodology for layout-dependent effects Prakash Krishnan 2014-05-20
8694943 Methods, systems, and computer program product for implementing electronic designs with connectivity and constraint awareness Henry Yu, Roland Ruehl, Regis Colwell, Joshua Baudhuin, Hui Xu +8 more 2014-04-08
7543262 Analog layout module generator and method Zhigang Wang, Regis Colwell 2009-06-02
7093220 Method for generating constrained component placement for integrated circuits and packages Rob A. Rutenbar 2006-08-15
6918102 Method and apparatus for exact relative positioning of devices in a semiconductor circuit layout Rob A. Rutenbar, Regis Colwell 2005-07-12
6874133 Integrated circuit design layout compaction method Prakash Gopalakrishnan, Rob A. Rutenbar 2005-03-29
6711725 Method of creating conformal outlines for use in transistor level semiconductor layouts Rob A. Rutenbar, Donald Benson Reaves 2004-03-23