Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12045730 | System, method, and computer program product for analog and mix-signal circuit placement | Elias Lee Fallon, David White, Hongzhou Liu, Hui Xu, Wangyang Zhang +2 more | 2024-07-23 |
| 11275882 | System, method, and computer program product for group and isolation prediction using machine learning and applications in analog placement and sizing | Wangyang Zhang, Elias Lee Fallon, Hua Luo, Namita Bhushan Rane | 2022-03-15 |
| 11263381 | System and method for updating shapes associated with an electronic design | Randall Lawson, Richard Allen Woodward, Jr., Rahil Rajesh Kothari, Mahmoodreza Jahanseirroodsari | 2022-03-01 |
| 11087060 | System, method, and computer program product for the integration of machine learning predictors in an automatic placement associated with an electronic design | Wangyang Zhang, Elias Lee Fallon, Hua Luo, Namita Bhushan Rane, Sheng Qian | 2021-08-10 |
| 10949596 | System, method, and computer program product for simultaneous routing and placement in an electronic circuit design | Wangyang Zhang, Hua Luo, Qian Xu | 2021-03-16 |
| 10747936 | System, method, and computer program product for genetic routing in an electronic circuit design | Hua Luo, Wangyang Zhang | 2020-08-18 |
| 10699051 | Method and system for performing cross-validation for model-based layout recommendations | Wangyang Zhang, Hua Luo, Namita Bhushan Rane, Elias Lee Fallon | 2020-06-30 |
| 10628546 | Method and system for automatically extracting layout design patterns for custom layout design reuse through interactive recommendations | Wangyang Zhang, Elias Lee Fallon, David White, José Ángel Martinez, Rong Yan | 2020-04-21 |
| 9990461 | Method and apparatus for placement and routing of analog components | Patrick C. Hyde, Akshat Shah, Jeremiah Cessna, Timothy Rosek, Khaled Elgalaind | 2018-06-05 |
| 9202000 | Implementing designs of guard ring and fill structures from simple unit cells | Gilles S. C. Lamant, Jeremiah Cessna, Khaled Elgalaind, Haitham Gad, Hsun-Chieh Yu +1 more | 2015-12-01 |
| 9064063 | Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints | Henry Yu, Joshua Baudhuin, Harsh Deshmane, Elias Lee Fallon, Sanjib Ghosh +8 more | 2015-06-23 |
| 8806405 | Producing a net topology pattern as a constraint upon routing of signal paths in an integrated circuit design | Arnold Ginetti, Khalid ElGalaind, Thomas W. Jordan, José Ángel Martinez, Jeffrey Markham +2 more | 2014-08-12 |
| 8694943 | Methods, systems, and computer program product for implementing electronic designs with connectivity and constraint awareness | Henry Yu, Roland Ruehl, Elias Lee Fallon, Joshua Baudhuin, Hui Xu +8 more | 2014-04-08 |
| 7945890 | Registry for electronic design automation of integrated circuits | Gilles S. C. Lamant, Alisa Yurovsky, Timothy Rosek | 2011-05-17 |
| 7543262 | Analog layout module generator and method | Zhigang Wang, Elias Lee Fallon | 2009-06-02 |
| 6918102 | Method and apparatus for exact relative positioning of devices in a semiconductor circuit layout | Rob A. Rutenbar, Elias Lee Fallon | 2005-07-12 |