Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9990461 | Method and apparatus for placement and routing of analog components | Regis Colwell, Patrick C. Hyde, Jeremiah Cessna, Timothy Rosek, Khaled Elgalaind | 2018-06-05 |
| 9286420 | Methods, systems, and articles for implementing extraction and electrical analysis-driven module creation | Prakash Krishnan, Jeremiah Cessna, Keith Dennison | 2016-03-15 |
| 9177095 | Methods, systems, and articles of manufacture for creating or manipulating electrical data sets for an electronic design | Prakash Krishnan, Wilfred Vance Kenzle | 2015-11-03 |
| 8769456 | Methods, systems, and articles for implementing extraction and electrical analysis-driven module creation | Prakash Krishnan, Jeremiah Cessna, Keith Dennison | 2014-07-01 |
| 8762914 | Methods, systems, and articles of manufacture for constraint verification for implementing electronic circuit designs with electrical awareness | Ed Fischer, Michael McSherry, David White, Bruce Yanagida | 2014-06-24 |
| 8694950 | Methods, systems, and articles of manufacture for implementing electronic circuit designs with electrical awareness | Michael McSherry, David White, Ed Fischer, Bruce Yanagida, Prakash Gopalakrishnan +1 more | 2014-04-08 |
| 8612921 | Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy | Prakash Gopalakrishnan, Rongchang Yan, David N. Dixon, Keith Dennison | 2013-12-17 |
| 8584072 | Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy | Prakash Gopalakrishnan, Rongchang Yan, David N. Dixon, Keith Dennison | 2013-11-12 |
| 8261228 | Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy | Prakash Gopalakrishnan, Rongchang Yan, David N. Dixon, Keith Dennison | 2012-09-04 |