DD

David N. Dixon

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 Washington, PA: #178 of 552 inventorsTop 35%
🗺 Pennsylvania: #23,606 of 74,527 inventorsTop 35%
Overall (All Time): #1,547,238 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
8612921 Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy Prakash Gopalakrishnan, Rongchang Yan, Akshat Shah, Keith Dennison 2013-12-17
8584072 Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy Prakash Gopalakrishnan, Rongchang Yan, Akshat Shah, Keith Dennison 2013-11-12
8261228 Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy Prakash Gopalakrishnan, Rongchang Yan, Akshat Shah, Keith Dennison 2012-09-04