MK

Mathew Koshy

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
SY Synopsys: 3 patents #460 of 2,302Top 20%
Broadcom: 2 patents #4,116 of 9,346Top 45%
📍 San Mateo, CA: #589 of 3,727 inventorsTop 20%
🗺 California: #55,401 of 386,348 inventorsTop 15%
Overall (All Time): #454,679 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
10545788 Physical to virtual scheduling system and method 2020-01-28
9798573 Physical to virtual scheduling system and method 2017-10-24
8863055 Capacitance extraction for advanced device technologies Arthur Nieuwoudt, Jiyoun Kim, Baribrata Biswas 2014-10-14
8522181 Capacitance extraction for advanced device technologies Arthur Nieuwoudt, Jiyoun Kim, Baribrata Biswas 2013-08-27
8448096 Method and system for parallel processing of IC design layouts Xiaojun Wang, Roland Ruehl, Li Ma, Tianhao Zhang, Udayan Gumaste +4 more 2013-05-21
8146032 Method and apparatus for performing RLC modeling and extraction for three-dimensional integrated circuit (3D-IC) designs Qiushi CHEN, Beifang Qiu, Charles C. Chiang, Xiaoping Hu, Baribrata Biswas 2012-03-27
7984399 System and method for random defect yield simulation of chip with built-in redundancy Roland Ruehl, Jonathan R. Fales, Udayan Gumaste 2011-07-19
7886243 System and method for using rules-based analysis to enhance models-based analysis Udayan Gumaste, Roland Ruehl, Harsh Deshmane 2011-02-08
7707528 System and method for performing verification based upon both rules and models David White, Roland Ruehl 2010-04-27
7689948 System and method for model-based scoring and yield prediction David White, Roland Ruehl 2010-03-30
7657856 Method and system for parallel processing of IC design layouts Roland Ruehl, Min Cao, Li Ma, Eitan Cadouri, Tianhao Zhang 2010-02-02