Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11403564 | Lithographic hotspot detection using multiple machine learning kernels | Yen-Ting Yu, Geng-He Lin, Hui-Ru Jiang | 2022-08-02 |
| 9594867 | DRC-based hotspot detection considering edge tolerance and incomplete specification | Yen-Ting Yu, Hui-Ru Jiang, Yumin Zhang | 2017-03-14 |
| 9098649 | Distance metric for accurate lithographic hotspot classification using radial and angular functions | Jing Guo, Fan Yang, Subarnarekha Sinha, Xuan Zeng | 2015-08-04 |
| 8635580 | Preconditioning for EDA cell library | Xin Wang | 2014-01-21 |
| 8601419 | Accurate process hotspot detection using critical design rule extraction | Yen-Ting Yu, Hui-Ru Jiang, Subarnarekha Sinha, Ya-Chung Chan | 2013-12-03 |
| 8490030 | Distance metric for accurate lithographic hotspot classification using radial and angular functions | Jing Guo, Fan Yang, Subarnarekha Sinha, Xuan Zeng | 2013-07-16 |
| 8452075 | Range pattern matching for hotspots containing vias and incompletely specified range patterns | Jingyu Xu, Subarnarekha Sinha | 2013-05-28 |
| 8286121 | Preconditioning for EDA cell library | Xin Wang | 2012-10-09 |
| 8219941 | Range pattern definition of susceptibility of layout regions to fabrication issues | Subarnarekha Sinha | 2012-07-10 |
| 8209639 | Identifying layout regions susceptible to fabrication issues by using range patterns | Subarnarekha Sinha, Hailong Yao | 2012-06-26 |
| 8205179 | Fast evaluation of average critical area for IC layouts | Qing Su, Subarnarekha Sinha | 2012-06-19 |
| 8205185 | Fast evaluation of average critical area for IC layouts | Qing Su, Subarnarekha Sinha | 2012-06-19 |
| 8176456 | Method and apparatus for computing dummy feature density for chemical-mechanical polishing | Xin Wang, Jamil Kawa | 2012-05-08 |
| 8151236 | Steiner tree based approach for polygon fracturing | Qing Su, Yongqiang Lu | 2012-04-03 |
| 8146032 | Method and apparatus for performing RLC modeling and extraction for three-dimensional integrated circuit (3D-IC) designs | Qiushi CHEN, Beifang Qiu, Xiaoping Hu, Mathew Koshy, Baribrata Biswas | 2012-03-27 |
| 8141007 | Method and apparatus for identifying and correcting phase conflicts | Subarnarekha Sinha | 2012-03-20 |
| 8006212 | Method and system for facilitating floorplanning for 3D IC | Subarnarekha Sinha | 2011-08-23 |
| 8000826 | Predicting IC manufacturing yield by considering both systematic and random intra-die process variations | Jianfeng Luo, Subarnarekha Sinha, Qing Su | 2011-08-16 |
| 7962873 | Fast evaluation of average critical area for ic layouts | Qing Su, Subarnarekha Sinha | 2011-06-14 |
| 7962882 | Fast evaluation of average critical area for IC layouts | Qing Su, Subarnarekha Sinha | 2011-06-14 |
| 7823099 | Lithography suspect spot location and scoring system | Min-Chun Tsai | 2010-10-26 |
| 7707526 | Predicting IC manufacturing yield based on hotspots | Qing Su | 2010-04-27 |
| 7703067 | Range pattern definition of susceptibility of layout regions to fabrication issues | Subarnarekha Sinha | 2010-04-20 |
| 7644378 | Preconditioning for EDA cell library | Xin Wang | 2010-01-05 |
| 7594213 | Method and apparatus for computing dummy feature density for chemical-mechanical polishing | Xin Wang, Jamil Kawa | 2009-09-22 |