Issued Patents All Time
Showing 25 most recent of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12408563 | Superconducting anti-fuse based field programmable gate array | Stephen Robert Whiteley, Eric M. Mlinar, Robert Erik Freeman | 2025-09-02 |
| 12368100 | Interconnects, inductors, transformers, and power architectures for circuits | Stephen Robert Whiteley, Victor Moroz | 2025-07-22 |
| 12320848 | Superconductive integrated circuit devices with on-chip testing | Abdelrahman G. Qoutb, Eby G. Friedman, Robert Erik Freeman, Stephen Robert Whiteley | 2025-06-03 |
| 12041858 | Josephson junction structures | Victor Moroz, Stephen Robert Whiteley | 2024-07-16 |
| 11973497 | Parameterized superconducting multi-row circuit | Stephen Robert Whiteley, Eric M. Mlinar | 2024-04-30 |
| 11937507 | Power harvesting for integrated circuits | Victor Moroz | 2024-03-19 |
| 11837280 | CFET architecture for balancing logic library and SRAM bitcell | Victor Moroz, Deepak D. Sherlekar | 2023-12-05 |
| 11599185 | Internet of things (IoT) power and performance management technique and circuit methodology | Thu Nguyen | 2023-03-07 |
| 11489102 | Josephson junction structures | Victor Moroz, Stephen Robert Whiteley | 2022-11-01 |
| 11342492 | Josephson junction structures | Victor Moroz, Stephen Robert Whiteley | 2022-05-24 |
| 11233516 | Single flux quantum circuit that includes a sequencing circuit | Stephen Robert Whiteley | 2022-01-25 |
| 11177317 | Power harvesting for integrated circuits | Victor Moroz | 2021-11-16 |
| 11164624 | SRAM and periphery specialized device sensors | Tzong-Kwang Henry Yeh | 2021-11-02 |
| 11133045 | Magnetoresistive random access memory (MRAM) bit cell with a narrow write window distribution | Victor Moroz | 2021-09-28 |
| 10990722 | FinFET cell architecture with insulator structure | Victor Moroz, Deepak D. Sherlekar | 2021-04-27 |
| 10950736 | Substrates and transistors with 2D material channels on 3D geometries | Victor Moroz, Joanne Huang | 2021-03-16 |
| 10891992 | Bit-line repeater insertion architecture | Prashant Dubey, Kritika Aditya | 2021-01-12 |
| 10867665 | Reset before write architecture and method | Prashant Dubey, Kritika Aditya | 2020-12-15 |
| 10790013 | Read-write architecture for low voltage SRAMs | Prashant Dubey, Ishita Satishchandra Desai, Shivangi Mittal, Surya Prakash Gupta | 2020-09-29 |
| 10741538 | Method and apparatus for floating or applying voltage to a well of an integrated circuit | Victor Moroz, James David Sproch, Robert B. Lefferts | 2020-08-11 |
| 10679719 | Enhancing memory yield and performance through utilizing nanowire self-heating | Victor Moroz | 2020-06-09 |
| 10665320 | Logic timing and reliability repair for nanowire circuits | Victor Moroz | 2020-05-26 |
| 10586588 | Reversing the effects of hot carrier injection and bias threshold instability in SRAMs | Thu Nguyen, Victor Moroz | 2020-03-10 |
| 10504988 | 2D material super capacitors | Victor Moroz | 2019-12-10 |
| 10411135 | Substrates and transistors with 2D material channels on 3D geometries | Victor Moroz, Joanne Huang | 2019-09-10 |