Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12287695 | Energy provisioning | Dinesh Maheshwari | 2025-04-29 |
| 12175287 | Processor instruction dispatch configuration | Brian Lee Kurtz, Dinesh Maheshwari | 2024-12-24 |
| 11960346 | Energy provisioning | Dinesh Maheshwari | 2024-04-16 |
| 10741538 | Method and apparatus for floating or applying voltage to a well of an integrated circuit | Victor Moroz, Jamil Kawa, Robert B. Lefferts | 2020-08-11 |
| 9728528 | Method and apparatus for floating or applying voltage to a well of an integrated circuit | Victor Moroz, Jamil Kawa, Robert B. Lefferts | 2017-08-08 |
| 9287253 | Method and apparatus for floating or applying voltage to a well of an integrated circuit | Victor Moroz, Jamil Kawa, Robert B. Lefferts | 2016-03-15 |
| 9275182 | Placing transistors in proximity to through-silicon vias | Victor Moroz, Xiaopeng Xu, Aditya Pradeep Karmarkar | 2016-03-01 |
| 9003348 | Placing transistors in proximity to through-silicon vias | Victor Moroz, Xiaopeng Xu, Aditya Pradeep Karmarkar | 2015-04-07 |
| 8999766 | ESD/antenna diodes for through-silicon vias | Qing Su, Min Ni, Zongwu Tang, Jamil Kawa | 2015-04-07 |
| 8904336 | Determination of meta-stable latch bias voltages | John Pasternak | 2014-12-02 |
| 8877638 | ESD/antenna diodes for through-silicon vias | Jamil Kawa, Min Ni, Qing Su, Zongwu Tang | 2014-11-04 |
| 8661387 | Placing transistors in proximity to through-silicon vias | Victor Moroz, Xiaopeng Xu, Aditya Pradeep Karmarkar | 2014-02-25 |
| 8362622 | Method and apparatus for placing transistors in proximity to through-silicon vias | Victor Moroz, Xiaopeng Xu, Aditya Pradeep Karmarkar | 2013-01-29 |
| 8264065 | ESD/antenna diodes for through-silicon vias | Qing Su, Min Ni, Zongwu Tang, Jamil Kawa | 2012-09-11 |
| 6704878 | Apparatus and method for improved precomputation to minimize power dissipation of integrated circuits | Luca Benini, Bernd Wurth | 2004-03-09 |
| 6480815 | Path dependent power modeling | Janet L. Olson, Yueqin Lin, Ivailo Nedelchev, Ashutosh S. Mauskar | 2002-11-12 |
| 6247134 | Method and system for pipe stage gating within an operating pipelined circuit for power savings | Michael Münch, Renu Mehra | 2001-06-12 |
| 6195630 | Three-dimensional power modeling table having dual output capacitance indices | Ashutosh S. Mauskar, Janet L. Olson, Yueqin Lin, Ivailo Nedelchev | 2001-02-27 |
| 6038381 | Method and system for determining a signal that controls the application of operands to a circuit-implemented function for power savings | Michael Münch, Bernd Wurth, Renu Mehra | 2000-03-14 |
| 5949689 | Path dependent power modeling | Janet L. Olson, Yueqin Lin, Ivailo Nedelchev, Ashutosh S. Mauskar | 1999-09-07 |
| 5903476 | Three-dimensional power modeling table having dual output capacitance indices | Ashutosh S. Mauskar, Janet L. Olson, Yueqin Lin, Ivailo Nedelchev | 1999-05-11 |
| 5838579 | State dependent power modeling | Janet L. Olson, Ivailo Nedelchev, Yuegin Danny Lin, Ashutosh S. Mauskar | 1998-11-17 |
| 4719456 | Video dot intensity balancer | Morton B. Herman | 1988-01-12 |
| 4638459 | Virtual ground read only memory | Henry Pechar | 1987-01-20 |