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Glitch source identification and ranking |
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2023-05-16 |
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Vector generation for maximum instantaneous peak power |
Youxin Gao, Mayur Bubna |
2022-12-20 |
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ESD/antenna diodes for through-silicon vias |
Min Ni, Zongwu Tang, Jamil Kawa, James David Sproch |
2015-04-07 |
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ESD/antenna diodes for through-silicon vias |
Jamil Kawa, Min Ni, James David Sproch, Zongwu Tang |
2014-11-04 |
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Banded computation architectures |
Min Ni, Zongwu Tang |
2014-06-24 |
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Convolution computation for many-core processor architectures |
Min Ni, Zongwu Tang |
2013-06-04 |
| 8264065 |
ESD/antenna diodes for through-silicon vias |
Min Ni, Zongwu Tang, Jamil Kawa, James David Sproch |
2012-09-11 |
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Fast evaluation of average critical area for IC layouts |
Subarnarekha Sinha, Charles C. Chiang |
2012-06-19 |
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Fast evaluation of average critical area for IC layouts |
Subarnarekha Sinha, Charles C. Chiang |
2012-06-19 |
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Steiner tree based approach for polygon fracturing |
Yongqiang Lu, Charles C. Chiang |
2012-04-03 |
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Predicting IC manufacturing yield by considering both systematic and random intra-die process variations |
Jianfeng Luo, Subarnarekha Sinha, Charles C. Chiang |
2011-08-16 |
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Fast evaluation of average critical area for ic layouts |
Subarnarekha Sinha, Charles C. Chiang |
2011-06-14 |
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Fast evaluation of average critical area for IC layouts |
Subarnarekha Sinha, Charles C. Chiang |
2011-06-14 |
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Predicting IC manufacturing yield based on hotspots |
Charles C. Chiang |
2010-04-27 |
| 7679872 |
Electrostatic-discharge protection using a micro-electromechanical-system switch |
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2010-03-16 |
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Method and apparatus to reduce random yield loss |
Subarnarekha Sinha, Charles C. Chiang |
2009-06-02 |
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Fast evaluation of average critical area for IC layouts |
Subarnarekha Sinha, Charles C. Chiang |
2008-03-18 |
| 7289933 |
Simulating topography of a conductive material in a semiconductor wafer |
Jianfeng Luo, Charles C. Chiang |
2007-10-30 |