Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8999766 | ESD/antenna diodes for through-silicon vias | Qing Su, Min Ni, Jamil Kawa, James David Sproch | 2015-04-07 |
| 8877638 | ESD/antenna diodes for through-silicon vias | Jamil Kawa, Min Ni, James David Sproch, Qing Su | 2014-11-04 |
| 8762918 | Banded computation architectures | Min Ni, Qing Su | 2014-06-24 |
| 8578313 | Pattern-clip-based hotspot database system for layout verification | Daniel Zhang, Alex Miloslavsky, Subarnarekha Sinha, Jingyu Xu, Kent Y. Kwang +1 more | 2013-11-05 |
| 8566754 | Dual-purpose perturbation engine for automatically processing pattern-clip-based manufacturing hotspots | Kent Y. Kwang, Daniel Zhang, Subarnarekha Sinha | 2013-10-22 |
| 8458635 | Convolution computation for many-core processor architectures | Min Ni, Qing Su | 2013-06-04 |
| 8264065 | ESD/antenna diodes for through-silicon vias | Qing Su, Min Ni, Jamil Kawa, James David Sproch | 2012-09-11 |
| 8037428 | Method and system for post-routing lithography-hotspot correction of a layout | Yang-Shan Tong, Daniel Zhang, Linni Wei, Alex Miloslavsky, Wei-Chih Tseng | 2011-10-11 |
| 7679872 | Electrostatic-discharge protection using a micro-electromechanical-system switch | Jamil Kawa, Subarnarekha Sinha, Min-Chun Tsai, Qing Su | 2010-03-16 |
| 7636904 | Locating critical dimension(s) of a layout feature in an IC design by modeling simulated intensities | Hua Song, Lantiang Wang | 2009-12-22 |
| 7496884 | Distributed hierarchical partitioning framework for verifying a simulated wafer image | Weiping Fang, Huijuan Zhang, Yibing Wang | 2009-02-24 |
| 7191428 | Centerline-based pinch/bridge detection | Juhwan Kim, Daniel Zhang, Haiqing Wei, Gang Huang | 2007-03-13 |