RM

Renu Mehra

SY Synopsys: 5 patents #244 of 2,302Top 15%
Overall (All Time): #926,831 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11947885 Low-power static signoff verification from within an implementation tool Meera Viswanath, David L. Allen, Sabyasachi Das, Kaushik De, Godwin R. Maben 2024-04-02
11449660 Method to perform secondary-PG aware buffering in IC design flow Jin-Mu Wu, Sabyasachi Das, Ben Mathew, Kunming Ho 2022-09-20
6810482 System and method for estimating power consumption of a circuit thourgh the use of an energy macro table Vikram Saxena 2004-10-26
6247134 Method and system for pipe stage gating within an operating pipelined circuit for power savings James David Sproch, Michael Münch 2001-06-12
6038381 Method and system for determining a signal that controls the application of operands to a circuit-implemented function for power savings Michael Münch, Bernd Wurth, James David Sproch 2000-03-14