JK

Jamil Kawa

SY Synopsys: 65 patents #3 of 2,302Top 1%
VT Vlsi Technology: 3 patents #168 of 594Top 30%
AC Artisan Components: 1 patents #12 of 23Top 55%
📍 Campbell, CA: #48 of 2,187 inventorsTop 3%
🗺 California: #4,522 of 386,348 inventorsTop 2%
Overall (All Time): #29,979 of 4,157,543Top 1%
69
Patents All Time

Issued Patents All Time

Showing 51–69 of 69 patents

Patent #TitleCo-InventorsDate
9076673 FinFET cell architecture with power traces Victor Moroz, Deepak D. Sherlekar 2015-07-07
9048121 FinFET cell architecture with insulator structure Victor Moroz, Deepak D. Sherlekar 2015-06-02
8999766 ESD/antenna diodes for through-silicon vias Qing Su, Min Ni, Zongwu Tang, James David Sproch 2015-04-07
8924908 FinFET cell architecture with power traces Victor Moroz, Deepak D. Sherlekar 2014-12-30
8877638 ESD/antenna diodes for through-silicon vias Min Ni, James David Sproch, Qing Su, Zongwu Tang 2014-11-04
8595661 N-channel and p-channel finFET cell architecture Victor Moroz, Deepak D. Sherlekar 2013-11-26
8561003 N-channel and P-channel finFET cell architecture with inter-block insulator Victor Moroz, Deepak D. Sherlekar 2013-10-15
8264065 ESD/antenna diodes for through-silicon vias Qing Su, Min Ni, Zongwu Tang, James David Sproch 2012-09-11
8176456 Method and apparatus for computing dummy feature density for chemical-mechanical polishing Xin Wang, Charles C. Chiang 2012-05-08
7795906 Leakage power management with NDR isolation devices 2010-09-14
7679872 Electrostatic-discharge protection using a micro-electromechanical-system switch Subarnarekha Sinha, Min-Chun Tsai, Zongwu Tang, Qing Su 2010-03-16
7594213 Method and apparatus for computing dummy feature density for chemical-mechanical polishing Xin Wang, Charles C. Chiang 2009-09-22
7417451 Leakage power management with NDR isolation devices 2008-08-26
7260807 Method and apparatus for designing an integrated circuit using a mask-programmable fabric Narendra V. Shenoy, Raul Camposano 2007-08-21
7100142 Method and apparatus for creating a mask-programmable architecture from standard cells Narendra V. Shenoy, Raul Camposano 2006-08-29
6369619 Voltage tolerant input/output circuit Rahul Nimaiyar, Puneet Sawhney, Anwar Awad 2002-04-09
5231311 Digital output buffer and method with slew rate control and reduced crowbar current Thomas V. Ferry, Kerry M. Pierce, William G. Walker, Michael A. Zampaglione, James S. Hsue 1993-07-27
5146306 Semiconductor FET structures with slew-rate control Thomas V. Ferry, Kerry M. Pierce, William G. Walker, James S. Hsue 1992-09-08
5111075 Reduced switching noise output buffer using diode for quick turn-off Thomas V. Ferry, Kerry M. Pierce, William G. Walker, Michael A. Zampaglione 1992-05-05