Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Narendra V. Shenoy

SYSynopsys: 8 patents #127 of 2,302Top 6%
Milpitas, CA: #628 of 3,192 inventorsTop 20%
California: #73,997 of 386,348 inventorsTop 20%
Overall (All Time): #656,167 of 4,157,543Top 20%
8 Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
8042010 Two-phase clock-stalling technique for error detection and error correction Florentin Dartu 2011-10-18
7689957 Identifying and improving robust designs using statistical timing analysis 2010-03-30
7260797 Method and apparatus for estimating parasitic capacitance Shabbir H. Batterywala, Madhav Desai 2007-08-21
7260807 Method and apparatus for designing an integrated circuit using a mask-programmable fabric Jamil Kawa, Raul Camposano 2007-08-21
7100142 Method and apparatus for creating a mask-programmable architecture from standard cells Jamil Kawa, Raul Camposano 2006-08-29
6397169 Adaptive cell separation and circuit changes driven by maximum capacitance rules Hi-Keung Tony Ma, Mahesh A. Iyer, Robert F. Damiano, Kevin M. Harer 2002-05-28
6378114 Method for the physical placement of an integrated circuit adaptive to netlist changes Lukas P. P. P. van Ginneken 2002-04-23
5822217 Method and apparatus for improving circuit retiming 1998-10-13