Issued Patents All Time
Showing 25 most recent of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12429900 | Controlled transition between configuration mode and user mode to reduce current-resistance voltage drop | Atul Maheshwari, Ankireddy Nalamalpu, Mahesh Kumashikar | 2025-09-30 |
| 12417331 | Systems and methods for circuit design dependent programmable maximum junction temperatures | Archanna Srinivasan, Rajiv K. Mongia, Ravi Prakash Gutala, Kaushik Chanda, Gurvinder Tiwana +1 more | 2025-09-16 |
| 12379698 | Systems and methods to reduce voltage guardband | Mahesh Kumashikar, MD Altaf Hossain, Yuet-Wing Li, Atul Maheshwari, Ankireddy Nalamalpu | 2025-08-05 |
| 12381561 | Circuits and methods for accessing signals in integrated circuits | Yi Peng, Brandon Lewis Gordon, Krishna Kumar Nagar | 2025-08-05 |
| 12355359 | Switch based on load current | MD Altaf Hossain, Ankireddy Nalamalpu, Mahesh Kumashikar, Dheeraj Subbareddy, Atul Maheshwari | 2025-07-08 |
| 12341511 | Power management using voltage islands on programmable logic devices | Mahesh Kumashikar, Ankireddy Nalamalpu, MD Altaf Hossain, Dheeraj Subbareddy, Atul Maheshwari +1 more | 2025-06-24 |
| 12326749 | Supply voltage control systems and methods for integrated circuits | Archanna Srinivasan, Ravi Prakash Gutala, Scott J. Weber, Aravind Raghavendra Dasu, Eriko Nurvitadhi | 2025-06-10 |
| 12273107 | Dynamically scalable timing and power models for programmable logic devices | Atul Maheshwari, Mahesh Kumashikar, Ian Kuon, Yuet-Wing Li, Ankireddy Nalamalpu +1 more | 2025-04-08 |
| 12255648 | Circuit systems and methods for reducing power supply voltage droop | Archanna Srinivasan, Ravi Prakash Gutala, Scott J. Weber, Aravind Raghavendra Dasu, Eriko Nurvitadhi | 2025-03-18 |
| 12253870 | Voltage regulator circuit systems and methods | Archanna Srinivasan, Ravi Prakash Gutala, Scott J. Weber, Aravind Raghavendra Dasu, Eriko Nurvitadhi | 2025-03-18 |
| 12216150 | On-die aging measurements for dynamic timing modeling | Dheeraj Subbareddy, Ankireddy Nalamalpu, Dhananjay Raghavan | 2025-02-04 |
| 12003238 | Fast memory for programmable devices | Scott J. Weber, Aravind Raghavendra Dasu, Patrick Koeberl | 2024-06-04 |
| 11789641 | Three dimensional circuit systems and methods having memory hierarchies | Scott J. Weber, Jawad B. Khan, Ilya K. Ganusov, Martin Langhammer, Matthew J. Adiletta +5 more | 2023-10-17 |
| 11609262 | On-die aging measurements for dynamic timing modeling | Dheeraj Subbareddy, Ankireddy Nalamalpu, Dhananjay Raghavan | 2023-03-21 |
| 11574101 | Techniques for providing optimizations based on categories of slack in timing paths | Scott Whitty | 2023-02-07 |
| 11489527 | Three dimensional programmable logic circuit systems and methods | Scott J. Weber, Aravind Raghavendra Dasu, Ravi Prakash Gutala, Eriko Nurvitadhi, Archanna Srinivasan +2 more | 2022-11-01 |
| 11368158 | Methods for handling integrated circuit dies with defects | Dheeraj Subbareddy, Ankireddy Nalamalpu | 2022-06-21 |
| 11113442 | Methods and apparatus for reducing reliability degradation on an integrated circuit | Ning Cheng, Xiangyong Wang | 2021-09-07 |
| 11101804 | Fast memory for programmable devices | Scott J. Weber, Aravind Raghavendra Dasu, Patrick Koeberl | 2021-08-24 |
| 10965536 | Methods and apparatus to insert buffers in a dataflow graph | Kermin ChoFleming, Jesmin Jahan Tithi, Suresh Srinivasan | 2021-03-30 |
| 10936772 | Methods for incremental circuit physical synthesis | Robert Walker, Vasudeva M. Kamath | 2021-03-02 |
| 10922461 | Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks | Vasudeva M. Kamath | 2021-02-16 |
| 10706203 | Method and apparatus for verifying initial state equivalence of changed registers in retimed circuits | — | 2020-07-07 |
| 10671790 | Method and apparatus for verifying structural correctness in retimed circuits | — | 2020-06-02 |
| 10523224 | Techniques for signal skew compensation | David W. Mendel, Carl Ebeling, Dana How | 2019-12-31 |