YM

Yutao Ma

Applied Materials: 5 patents #2,165 of 7,310Top 30%
CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
CT Candescent Technologies: 1 patents #80 of 125Top 65%
PS Proplus Design Solutions: 1 patents #5 of 9Top 60%
Overall (All Time): #330,224 of 4,157,543Top 8%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12259202 Magazine and intelligent approval system thereof 2025-03-25
12204836 Method and system for parallel design and technology optimization Zhihong Liu 2025-01-21
10339240 Adaptive high sigma yield prediction Bruce W. McGaughy 2019-07-02
7979814 Model implementation on GPU Yi Xu 2011-07-12
7933747 Method and system for simulating dynamic behavior of a transistor Min-Chie Jeng, Bruce W. McGaughy, Lifeng Wu, Zhihong Liu 2011-04-26
7815495 Pad conditioner Kun Xu, Jimin Zhang, James C. Wang, Thomas H. Osterheld, Steven M. Zuniga +1 more 2010-10-19
7606693 Circuit simulation with decoupled self-heating analysis Min-Che Jeng, Zhihong Liu 2009-10-20
7299428 Model stamping matrix check technique in circuit simulator Bruce W. McGaughy, Zhihong Liu 2007-11-20
6620027 Method and apparatus for hard pad polishing Ajoy Zutshi, Rajeev Bajaj, Fred C. Redeker, Kapila Wijekoon 2003-09-16
6436832 Method to reduce polish initiation time in a polish process Juilung Li, Fred C. Redeker, Tse-Yong Yao, Rajeev Bajaj 2002-08-20
6436302 Post CU CMP polishing for reduced defects Juy-Lung Li, Tse-Yong Yao, Fred C. Redeker, Rajeev Bajaj 2002-08-20
6261157 Selective damascene chemical mechanical polishing Rajeev Bajaj, Fritz Redeker, John M. White, Shijian Li 2001-07-17
6129603 Low temperature glass frit sealing for thin computer displays Jennifer Y. Sun 2000-10-10
5346747 Composite printed circuit board substrate and process for its manufacture Vincent Michael Vancho, Hak H. Wu, Erik L. Jorgensen 1994-09-13