Issued Patents All Time
Showing 26–50 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11177435 | Cross-point memory-selector composite pillar stack structures and methods of forming the same | Hon-Sum Philip Wong | 2021-11-16 |
| 11164767 | Integrated system for semiconductor process | Hua Chung, Schubert S. Chu | 2021-11-02 |
| 10770568 | Method to remove III-V materials in high aspect ratio structures | Ying Zhang, Qingjun Zhou, YungChen Lin | 2020-09-08 |
| 10741393 | Methods for bottom up fin structure formation | Yung-Chen Lin, Qingjun Zhou, Ying Zhang | 2020-08-11 |
| 10504717 | Integrated system and method for source/drain engineering | Chun YAN, Melitta Hon, Hua Chung, Schubert S. Chu | 2019-12-10 |
| 10438796 | Method for removing native oxide and residue from a III-V group containing surface | Chun YAN | 2019-10-08 |
| 10332739 | UV radiation system and method for arsenic outgassing control in sub 7nm CMOS fabrication | Chun YAN, Hua Chung, Schubert S. Chu | 2019-06-25 |
| 10276688 | Selective process for source and drain formation | Zhiyuan Ye, Flora Fong-Song CHANG, Abhishek Dube, Xuebin Li, Errol Antonio C. Sanchez +2 more | 2019-04-30 |
| 10269647 | Self-aligned EPI contact flow | Ying Zhang, Schubert S. Chu, Regina Freed, Hua Chung | 2019-04-23 |
| 10256322 | Co-doping process for n-MOS source drain application | Zhiyuan Ye, Hua Chung | 2019-04-09 |
| 10243063 | Method of uniform channel formation | Chun YAN | 2019-03-26 |
| 10236190 | Method for wafer outgassing control | Chun YAN | 2019-03-19 |
| 10224421 | Self-aligned process for sub-10nm fin formation | Zhiyuan Ye, Chun Yan, Hua Chung, Schubert S. Chu, Satheesh Kuppurao | 2019-03-05 |
| 10204781 | Methods for bottom up fin structure formation | Yung-Chen Lin, Qingjun Zhou, Ying Zhang | 2019-02-12 |
| 10205002 | Method of epitaxial growth shape control for CMOS applications | Chun YAN, Errol Antonio C. Sanchez, Hua Chung | 2019-02-12 |
| 10147596 | Methods and solutions for cleaning INGAAS (or III-V) substrates | Chun YAN | 2018-12-04 |
| 10125415 | Structure for relaxed SiGe buffers including method and apparatus for forming | Zhiyuan Ye, Errol Antonio C. Sanchez, Keun-Yong Ban | 2018-11-13 |
| 10115607 | Method and apparatus for wafer outgassing control | Chun YAN, Hua Chung, Schubert S. Chu | 2018-10-30 |
| 10090147 | Integrated system and method for source/drain engineering | Chun Yan, Melitta Hon, Hua Chung, Schubert S. Chu | 2018-10-02 |
| 10043870 | Method and structure to improve film stack with sensitive and reactive layers | Zhiyuan Ye, Errol Antonio C. Sanchez, David K. Carlson, Keun-Yong Ban | 2018-08-07 |
| 10043666 | Method for inter-chamber process | Errol Antonio C. Sanchez, Zhiyuan Ye, Keun-Yong Ban | 2018-08-07 |
| 10043667 | Integrated method for wafer outgassing reduction | Chun YAN, Hua Chung, Schubert S. Chu | 2018-08-07 |
| 10002759 | Method of forming structures with V shaped bottom on silicon substrate | Chun YAN, Errol Antonio C. Sanchez | 2018-06-19 |
| 9923081 | Selective process for source and drain formation | Zhiyuan Ye, Flora Fong-Song CHANG, Abhishek Dube, Xuebin Li, Errol Antonio C. Sanchez +2 more | 2018-03-20 |
| 9905412 | Method and solution for cleaning InGaAs (or III-V) substrates | Chun YAN | 2018-02-27 |