Issued Patents All Time
Showing 101–125 of 161 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8316536 | Multi-level circuit substrate fabrication method | David Jon Hiner, Russ Lie | 2012-11-27 |
| 8298866 | Wafer level package and fabrication method | Sukianto Rusli, David Razu | 2012-10-30 |
| 8263486 | Bumped chip package fabrication method and structure | Rex Anderson, Ravi Kiran Chilukuri | 2012-09-11 |
| 8227338 | Semiconductor package including a top-surface metal layer for implementing circuit features | Christopher M. Scanlan | 2012-07-24 |
| 8188584 | Direct-write wafer level chip scale package | Christopher J. Berry, David Jon Hiner | 2012-05-29 |
| 8176628 | Protruding post substrate package structure and method | Sukianto Rusli, David Jon Hiner | 2012-05-15 |
| 8119455 | Wafer level package fabrication method | Sukianto Rusli, David Razu | 2012-02-21 |
| 8110909 | Semiconductor package including top-surface terminals for mounting another semiconductor package | David Jon Hiner, Sukianto Rusli | 2012-02-07 |
| 8026587 | Semiconductor package including top-surface terminals for mounting another semiconductor package | David Jon Hiner, Sukianto Rusli | 2011-09-27 |
| 8017436 | Thin substrate fabrication method and structure | Sukianto Rusli, Bob Shih-Wei Kuo, Jon Aday, Lee Smith, Robert Francis Darveaux | 2011-09-13 |
| 8018068 | Semiconductor package including a top-surface metal layer for implementing circuit features | Christopher M. Scanlan | 2011-09-13 |
| 7994045 | Bumped chip package fabrication method and structure | Rex Anderson, Ravi Kiran Chilukuri | 2011-08-09 |
| 7977163 | Embedded electronic component package fabrication method | Sukianto Rusli, David Jon Hiner | 2011-07-12 |
| 7958626 | Embedded passive component network substrate fabrication method | Nozad Karim, Sukianto Rusli | 2011-06-14 |
| 7951697 | Embedded die metal etch stop fabrication method and structure | Sukianto Rusli | 2011-05-31 |
| 7932595 | Electronic component package comprising fan-out traces | Sukianto Rusli, David Razu | 2011-04-26 |
| 7932170 | Flip chip bump structure and fabrication method | Roger D. St. Amand, Robert Francis Darveaux | 2011-04-26 |
| 7923645 | Metal etch stop fabrication method and structure | Sukianto Rusli, Robert Francis Darveaux | 2011-04-12 |
| 7911037 | Method and structure for creating embedded metal features | Sukianto Rusli, David Jon Hiner, Nozad Karim | 2011-03-22 |
| 7842541 | Ultra thin package and fabrication method | Sukianto Rusli, Bob Shih-Wei Kuo, Lee Smith | 2010-11-30 |
| 7832097 | Shielded trace structure and fabrication method | Sukianto Rusli, Nozad Karim | 2010-11-16 |
| 7752752 | Method of fabricating an embedded circuit pattern | Sukianto Rusli | 2010-07-13 |
| 7723210 | Direct-write wafer level chip scale package | Christopher J. Berry, David Jon Hiner | 2010-05-25 |
| 7714431 | Electronic component package comprising fan-out and fan-in traces | Sukianto Rusli, David Razu | 2010-05-11 |
| 7692286 | Two-sided fan-out wafer escape package | Russ Lie, David Jon Hiner | 2010-04-06 |