Issued Patents All Time
Showing 126–150 of 161 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7670962 | Substrate having stiffener fabrication method | Sukianto Rusli, David Jon Hiner | 2010-03-02 |
| 7671457 | Semiconductor package including top-surface terminals for mounting another semiconductor package | David Jon Hiner, Sukianto Rusli | 2010-03-02 |
| 7632753 | Wafer level package utilizing laser-activated dielectric material | Sukianto Rusli, Bob Shih-Wei Kuo | 2009-12-15 |
| 7633765 | Semiconductor package including a top-surface metal layer for implementing circuit features | Christopher M. Scanlan | 2009-12-15 |
| 7589398 | Embedded metal features structure | Sukianto Rusli, David Jon Hiner, Nozad Karim | 2009-09-15 |
| 7572681 | Embedded electronic component package | Sukianto Rusli, David Jon Hiner | 2009-08-11 |
| 7548430 | Buildup dielectric and metallization process and semiconductor package | Sukianto Rusli, David Jon Hiner | 2009-06-16 |
| 7501338 | Semiconductor package substrate fabrication method | David Jon Hiner, Sukianto Rusli, Richard P. Sheridan | 2009-03-10 |
| 7420272 | Two-sided wafer escape package | Russ Lie, David Jon Hiner | 2008-09-02 |
| 7399661 | Method for making an integrated circuit substrate having embedded back-side access conductors and vias | David Jon Hiner, Sukianto Rusli | 2008-07-15 |
| 7365006 | Semiconductor package and substrate having multi-level vias fabrication method | David Jon Hiner, Sukianto Rusli | 2008-04-29 |
| 7361533 | Stacked embedded leadframe | Sukianto Rusli, David Jon Hiner | 2008-04-22 |
| 7334326 | Method for making an integrated circuit substrate having embedded passive components | Sukitano Rusli | 2008-02-26 |
| 7312103 | Method for making an integrated circuit substrate having laser-embedded conductive patterns | Sukianto Rusli | 2007-12-25 |
| 7297562 | Circuit-on-foil process for manufacturing a laminated semiconductor package substrate having embedded conductive patterns | Sukianto Rusli | 2007-11-20 |
| 7247523 | Two-sided wafer escape package | Russ Lie, David Jon Hiner | 2007-07-24 |
| 7192807 | Wafer level package and fabrication method | Sukianto Rusli, David Razu | 2007-03-20 |
| 7190062 | Embedded leadframe semiconductor package | Richard P. Sheridan, David Jon Hiner, Sukianto Rusli | 2007-03-13 |
| 7185426 | Method of manufacturing a semiconductor package | David Jon Hiner, Sukianto Rusli | 2007-03-06 |
| 7145238 | Semiconductor package and substrate having multi-level vias | David Jon Hiner, Sukianto Rusli | 2006-12-05 |
| 7028400 | Integrated circuit substrate having laser-exposed terminals | David Jon Hiner, Sukianto Rusli | 2006-04-18 |
| 6987661 | Integrated circuit substrate having embedded passive components and methods therefor | Sukitano Rusli | 2006-01-17 |
| 6967124 | Imprinted integrated circuit substrate and method for imprinting an integrated circuit substrate | Sukianto Rusli | 2005-11-22 |
| 6930256 | Integrated circuit substrate having laser-embedded conductive patterns and method therefor | Sukianto Rusli | 2005-08-16 |
| 6930257 | Integrated circuit substrate having laminated laser-embedded circuit layers | David Jon Hiner, Sukianto Rusli | 2005-08-16 |