Randy J. Simmons has been granted 10 US patents while listed as an inventor at AMD . The first was granted in 2004 and the most recent in September 2020. Randy J. Simmons ranks #481,000 of 4,157,543 US inventors in our database (top 11.6%). Patent records list Randy J. Simmons in San Jose, CA, US.
Patents per Year Patents granted per year, 2004 to 2020 Bar chart with a peak of 3 patents in 2005. peak 3 2004: 1 patents 2004 2005: 3 patents 2005 2006: 1 patents 2006 2007: 1 patents 2007 2009: 2 patents 2009 2011: 1 patents 2011 2020: 1 patents 2020
Issued Patents All Time
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Showing 1–10 of 10 patents
Patent # Title Co-Inventors Date Approx Value ⓘ
10761137
Flexible manufacturing flow enabled by adaptive binning system
Lee N. Chung , Arnold Louie , Dahshi Shen , Felino E. Pagaduan , Tony Le
2020-09-01
$23,756,000
8030954
Internal voltage level shifting for screening cold or hot temperature defects using room temperature testing
Srinivasa R. Parthasarathy , Lee N. Chung , Jian Shi
2011-10-04
$8,848,000
7583102
Testing of input/output devices of an integrated circuit
Tuyet Ngoc Simmons , Andy T. Nguyen , Andrew W. Lai , Shankar Lakkapragada
2009-09-01
$16,147,000
7558995
Method and apparatus for eliminating noise induced errors during test of a programmable logic device
Teymour M. Mansour
2009-07-07
$5,716,000
7262623
Method for gross I/O functional test at wafer sort
David Mark , Yung-Cheng Chen
2007-08-28
$20,998,000
7124338
Methods of testing interconnect lines in programmable logic devices using partial reconfiguration
David Mark , Huy Le , Kazi S. Afzal
2006-10-17
$13,661,000
6943581
Test methodology for direct interconnect with multiple fan-outs
Arnold A. Cruz
2005-09-13
$11,909,000
6944809
Methods of resource optimization in programmable logic devices to reduce test time
Andrew W. Lai , Teymour M. Mansour , Vincent L. Tong , Jeffrey V. Lindholm , Jay T. Young +2 more
2005-09-13
$11,909,000
6889368
Method and apparatus for localizing faults within a programmable logic device
David Mark , Min Luo
2005-05-03
$34,262,000
6788095
Method for gross input leakage functional test at wafer sort
David Mark
2004-09-07
$9,185,000