Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8633722 | Method and circuit for testing accuracy of delay circuitry | — | 2014-01-21 |
| 8327201 | Parallel testing of an integrated circuit that includes multiple dies | — | 2012-12-04 |
| 7739564 | Testing an integrated circuit using dedicated function pins | Tuyet Ngoc Simmons | 2010-06-15 |
| 7728604 | Testing differential signal standards using device under test's built in resistors | Tuyet Ngoc Simmons, Brian M. Sadler, Michael Leonard Simmons | 2010-06-01 |
| 7724030 | Method and apparatus for providing a feedback path for an output signal | Steven E. McNeil | 2010-05-25 |
| 7685486 | Testing of an embedded multiplexer having a plurality of inputs | — | 2010-03-23 |
| 7620862 | Method of and system for testing an integrated circuit | — | 2009-11-17 |
| 7583102 | Testing of input/output devices of an integrated circuit | Tuyet Ngoc Simmons, Andy T. Nguyen, Randy J. Simmons, Shankar Lakkapragada | 2009-09-01 |
| 7219314 | Application-specific methods for testing molectronic or nanoscale devices | Steven M. Trimberger, Shekhar Bapat, Robert W. Wells, Robert D. Patrie | 2007-05-15 |
| 7187199 | Structures and methods for testing programmable logic devices having mixed-fabric architectures | — | 2007-03-06 |
| 7007250 | Application-specific methods useful for testing look up tables in programmable logic devices | Shekhar Bapat, Robert W. Wells, Robert D. Patrie | 2006-02-28 |
| 6944836 | Structures and methods for testing programmable logic devices having mixed-fabric architectures | — | 2005-09-13 |
| 6944809 | Methods of resource optimization in programmable logic devices to reduce test time | Randy J. Simmons, Teymour M. Mansour, Vincent L. Tong, Jeffrey V. Lindholm, Jay T. Young +2 more | 2005-09-13 |
| 6876218 | Method for accurate output voltage testing | Tuyet Ngoc Simmons | 2005-04-05 |
| 6732309 | Method for testing faults in a programmable logic device | Shahin Toutounchi | 2004-05-04 |