KW

Karsten Wieczorek

AM AMD: 76 patents #54 of 9,279Top 1%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
📍 Fürth, CA: #1 of 2 inventorsTop 50%
Overall (All Time): #23,945 of 4,157,543Top 1%
78
Patents All Time

Issued Patents All Time

Showing 26–50 of 78 patents

Patent #TitleCo-InventorsDate
6849516 Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer Thomas Feudel, Manfred Horstmann, Stephan Kruegel 2005-02-01
6838363 Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material Thorsten Kammler, Manfred Horstmann 2005-01-04
6821887 Method of forming a metal silicide gate in a standard MOS process sequence Stephan Kruegel, Manfred Horstmann, Thomas Feudel 2004-11-23
6821840 Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area Gert Burbach, Thomas Feudel 2004-11-23
6812074 SOI field effect transistor element having a recombination region and method of forming same Manfred Horstmann, Christian Krueger 2004-11-02
6812159 Method of forming a low leakage dielectric layer providing an increased capacitive coupling Falk Graetsch, Lutz Herrmann 2004-11-02
6812115 Method of filling an opening in a material layer with an insulating material Stephan Kruegel, Michael Raab 2004-11-02
6806126 Method of manufacturing a semiconductor component Scott Luning, Thorsten Kammler 2004-10-19
6806153 Method of manufacturing a field effect transistor Manfred Horstmann, Thomas Feudel 2004-10-19
6798028 Field effect transistor with reduced gate delay and method of fabricating the same Manfred Horstmann, Rolf Stephan, Stephan Kruegel 2004-09-28
6770552 Method of forming a semiconductor device having T-shaped gate structure Manfred Horstmann, Rolf Stephan 2004-08-03
6754553 Implant monitoring using multiple implanting and annealing steps Manfred Horstmann, Christian Krueger 2004-06-22
6746927 Semiconductor device having a polysilicon line structure with increased metal silicide portions and method for forming the polysilicon line structure of a semiconductor device Thorsten Kammler, Christof Streck 2004-06-08
6723663 Technique for forming an oxide/nitride layer stack by controlling the nitrogen ion concentration in a nitridation plasma Falk Graetsch, Lutz Herrmann 2004-04-20
6703278 Method of forming layers of oxide on a surface of a substrate Falk Graetsch, Stephan Kruegel 2004-03-09
6673665 Semiconductor device having increased metal silicide portions and method of forming the semiconductor Manfred Horstmann, Rolf Stephan 2004-01-06
6620718 Method of forming metal silicide regions on a gate electrode and on the source/drain regions of a semiconductor device Michael Raab, Rolf Stephan 2003-09-16
6593197 Sidewall spacer based fet alignment technology Manfred Horstmann, Rolf Stephan, Michael Raab 2003-07-15
6566718 Field effect transistor with an improved gate contact and method of fabricating the same Rolf Stephan, Manfred Horstmann, Stephan Kruegel 2003-05-20
6555892 Semiconductor device with reduced line-to-line capacitance and cross talk noise Manfred Horstmann, Frederick N. Hause 2003-04-29
6541863 Semiconductor device having a reduced signal processing time and a method of fabricating the same Manfred Horstmann, Gert Burbach 2003-04-01
6491799 Method for forming a thin dielectric layer Frederick N. Hause, Manfred Horstmann 2002-12-10
6492210 Method for fully self-aligned FET technology Manfred Horstmann, Rolf Stephan, Michael Raab 2002-12-10
6436724 Method of monitoring the temperature of a rapid thermal anneal process in semiconductor manufacturing and a test wafer for use in this method Manfred Horstmann, Christian Krüger 2002-08-20
6423634 Method of forming low resistance metal silicide region on a gate electrode of a transistor Michael Raab, Rolf Stephan 2002-07-23