Issued Patents All Time
Showing 51–75 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6410410 | Method of forming lightly doped regions in a semiconductor device | Thomas Feudel, Manfred Horstmann | 2002-06-25 |
| 6383906 | Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption | Nicholas J. Kepler, Paul R. Besser, Larry Wang | 2002-05-07 |
| 6380040 | Prevention of dopant out-diffusion during silicidation and junction formation | Nick Kepler, Larry Wang, Paul R. Besser | 2002-04-30 |
| 6358826 | Device improvement by lowering LDD resistance with new spacer/silicide process | Frederick N. Hause, Manfred Horstmann | 2002-03-19 |
| 6352885 | Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same | Frederick N. Hause, Manfred Horstmann | 2002-03-05 |
| 6344397 | Semiconductor device having a gate electrode with enhanced electrical characteristics | Manfred Horstmann, Bernd Engelmann | 2002-02-05 |
| 6306698 | Semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions, and method of making same | Michael Raab, Rolf Stephan | 2001-10-23 |
| 6281086 | Semiconductor device having a low resistance gate conductor and method of fabrication the same | Manfred Horstmann, Tilo Mantei | 2001-08-28 |
| 6274511 | Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of refractory metal layer | Nick Kepler, Paul R. Besser | 2001-08-14 |
| 6274894 | Low-bandgap source and drain formation for short-channel MOS transistors | Manfred Horstmann, Frederick N. Hause | 2001-08-14 |
| 6271122 | Method of compensating for material loss in a metal silicone layer in contacts of integrated circuit devices | Michael Raab, Gert Burbach | 2001-08-07 |
| 6268257 | Method of forming a transistor having a low-resistance gate electrode | Michael Raab, Rolf Stephan | 2001-07-31 |
| 6255703 | Device with lower LDD resistance | Frederick N. Hause, Manfred Horstmann | 2001-07-03 |
| 6255182 | Method of forming a gate structure of a transistor by means of scalable spacer technology | Manfred Horstmann, Frederick N. Hause | 2001-07-03 |
| 6255214 | Method of forming junction-leakage free metal silicide in a semiconductor wafer by amorphization of source and drain regions | Nick Kepler, Paul R. Besser | 2001-07-03 |
| 6242776 | Device improvement by lowering LDD resistance with new silicide process | Frederick N. Hause, Manfred Horstmann | 2001-06-05 |
| 6238986 | Formation of junctions by diffusion from a doped film at silicidation | Nick Kepler, Larry Wang, Paul R. Besser | 2001-05-29 |
| 6218250 | Method and apparatus for minimizing parasitic resistance of semiconductor devices | Frederick N. Hause, Manfred Horstmann | 2001-04-17 |
| 6207563 | Low-leakage CoSi2-processing by high temperature thermal processing | Manfred Horstmann, Frederick N. Hause | 2001-03-27 |
| 6204177 | Method of forming junction leakage free metal silicide in a semiconductor wafer by alloying refractory metal | Paul R. Besser, Nick Kepler | 2001-03-20 |
| 6169005 | Formation of junctions by diffusion from a doped amorphous silicon film during silicidation | Nick Kepler, Larry Wang, Paul R. Besser | 2001-01-02 |
| 6165903 | Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation | Paul R. Besser, Nick Kepler | 2000-12-26 |
| 6162689 | Multi-depth junction formation tailored to silicide formation | Nick Kepler, Larry Wang, Paul R. Besser | 2000-12-19 |
| 6150243 | Shallow junction formation by out-diffusion from a doped dielectric layer through a salicide layer | Nick Kepler, Larry Wang, Paul R. Besser | 2000-11-21 |
| 6133124 | Device improvement by source to drain resistance lowering through undersilicidation | Manfred Horstmann, Frederick N. Hause | 2000-10-17 |