Issued Patents All Time
Showing 351–359 of 359 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5723238 | Inspection of lens error associated with lens heating in a photolithographic system | Bradley T. Moore, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-03-03 |
| 5717242 | Integrated circuit having local interconnect for reduing signal cross coupled noise | Mark W. Michael, Robert Dawson, Basab Bandyopadhyay, Fred N. Hause, William S. Brennan | 1998-02-10 |
| 5710054 | Method of forming a shallow junction by diffusion from a silicon-based spacer | Mark I. Gardner, Robert Dawson, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 1998-01-20 |
| 5679605 | Multilevel interconnect structure of an integrated circuit formed by a single via etch and dual fill process | William S. Brennan, Robert Dawson, Fred N. Hause, Basab Bandyopadhyay, Mark W. Michael | 1997-10-21 |
| 5674788 | Method of forming high pressure silicon oxynitride gate dielectrics | Dirk J. Wristers, Dim-Lee Kwong | 1997-10-07 |
| 5648286 | Method of making asymmetrical transistor with lightly doped drain region, heavily doped source and drain regions, and ultra-heavily doped source region | Mark I. Gardner, Derick J. Wristers | 1997-07-15 |
| 5591681 | Method for achieving a highly reliable oxide film | Dirk J. Wristers, Dim-Lee Kwong | 1997-01-07 |
| 5498577 | Method for fabricating thin oxides for a semiconductor technology | Mark I. Gardner | 1996-03-12 |
| 5445975 | Semiconductor wafer with enhanced pre-process denudation and process-induced gettering | Mark I. Gardner, Derick J. Wristers | 1995-08-29 |