Issued Patents All Time
Showing 126–150 of 152 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5874343 | CMOS integrated circuit and method for forming source/drain areas prior to forming lightly doped drains to optimize the thermal diffusivity thereof | H. Jim Fulford, Mark I. Gardner | 1999-02-23 |
| 5874340 | Method for fabrication of a non-symmetrical transistor with sequentially formed gate electrode sidewalls | Mark I. Gardner, H. Jim Fulford | 1999-02-23 |
| 5869879 | CMOS integrated circuit having a sacrificial metal spacer for producing graded NMOS source/drain junctions dissimilar from PMOS source/drain junctions | H. Jim Fulford, Mark I. Gardner | 1999-02-09 |
| 5869866 | Integrated circuit having sacrificial spacers for producing graded NMOS source/drain junctions possibly dissimilar from PMOS source/drain junctions | H. Jim Fulford, Mark I. Gardner | 1999-02-09 |
| 5854121 | Semiconductor fabrication employing barrier atoms incorporated at the edges of a trench isolation structure | Mark I. Gardner, H. Jim Fulford | 1998-12-29 |
| 5851891 | IGFET method of forming with silicide contact on ultra-thin gate | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-12-22 |
| 5847428 | Integrated circuit gate conductor which uses layered spacers to produce a graded junction | H. Jim Fulford, Mark I. Gardner | 1998-12-08 |
| 5844276 | CMOS integrated circuit and method for implanting NMOS transistor areas prior to implanting PMOS transistor areas to optimize the thermal diffusivity thereof | H. Jim Fulford, Mark I. Gardner | 1998-12-01 |
| 5840451 | Individually controllable radiation sources for providing an image pattern in a photolithographic system | Bradley T. Moore, Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause +1 more | 1998-11-24 |
| 5837557 | Semiconductor fabrication method of forming a master layer to combine individually printed blocks of a circuit pattern | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-11-17 |
| 5831306 | Asymmetrical transistor with lightly doped drain region, heavily doped source and drain regions, and ultra-heavily doped source region | Mark I. Gardner, H. Jim Fulford | 1998-11-03 |
| 5827761 | Method of making NMOS and devices with sequentially formed gates having different gate lengths | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-10-27 |
| 5811222 | Method of selectively exposing a material using a photosensitive layer and multiple image patterns | Mark I. Gardner, H. Jim Fulford | 1998-09-22 |
| 5801088 | Method of forming a gate electrode for an IGFET | Mark I. Gardner, H. Jim Fulford | 1998-09-01 |
| 5801075 | Method of forming trench transistor with metal spacers | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1998-09-01 |
| 5796143 | Trench transistor in combination with trench array | H. Jim Fulford, Mark I. Gardner | 1998-08-18 |
| 5770485 | MOSFET device with an amorphized source and fabrication method thereof | Mark I. Gardner, H. Jim Fulford | 1998-06-23 |
| 5766969 | Multiple spacer formation/removal technique for forming a graded junction | H. Jim Fulford, Mark I. Gardner | 1998-06-16 |
| 5723238 | Inspection of lens error associated with lens heating in a photolithographic system | Bradley T. Moore, Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause +1 more | 1998-03-03 |
| 5710054 | Method of forming a shallow junction by diffusion from a silicon-based spacer | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1998-01-20 |
| 5679585 | Method for forming metal silicide on a semiconductor surface with minimal effect on pre-existing implants | Mark I. Gardner, Fred N. Hause, Dim-Lee Kwong | 1997-10-21 |
| 5672531 | Method for fabrication of a non-symmetrical transistor | Mark I. Gardner, Michael Duane | 1997-09-30 |
| 5656518 | Method for fabrication of a non-symmetrical transistor | Mark I. Gardner, Daniel Kadosh | 1997-08-12 |
| 5648286 | Method of making asymmetrical transistor with lightly doped drain region, heavily doped source and drain regions, and ultra-heavily doped source region | Mark I. Gardner, H. Jim Fulford | 1997-07-15 |
| 5472774 | Photolithography test structure | Howard S. Goad, James H. Hussey, Jr., Michael A. Hillis, William C. Chapman | 1995-12-05 |