Issued Patents All Time
Showing 51–75 of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8785296 | Packaging method with backside wafer dicing | Yan Xun Xue, Ping Huang | 2014-07-22 |
| 8778735 | Packaging method of molded wafer level chip scale package (WLCSP) | Yan Xun Xue, Hamza Yilmaz, Jun Lu, Ping Huang, Lei Shi +2 more | 2014-07-15 |
| 8772144 | Vertical gallium nitride Schottky diode | TingGang Zhu, Anup Bhalla, Ping Huang | 2014-07-08 |
| 8716063 | Wafer level chip scale package and process of manufacture | Tao Feng, Francois Hebert, Ming Sun | 2014-05-06 |
| 8716069 | Semiconductor device employing aluminum alloy lead-frame with anodized aluminum | Yan Xun Xue, Yongping Ding | 2014-05-06 |
| 8686546 | Combined packaged power semiconductor device | Hamza Yilmaz, Yan Xun Xue, Jun Lu | 2014-04-01 |
| 8642385 | Wafer level package structure and the fabrication method thereof | Yan Xun Xue, Ping Huang, Hamza Yilmaz, Jun Lu, Ming-Chen Lu | 2014-02-04 |
| 8586414 | Top exposed package and assembly method | Yan Xun Xue, Hamza Yilmaz, Anup Bhalla, Jun Lu, Kal Liu | 2013-11-19 |
| 8581376 | Stacked dual chip package and method of fabrication | Hamza Yilmaz, Xiaotian Zhang, Yan Xun Xue, Anup Bhalla, Jun Lu +2 more | 2013-11-12 |
| 8569169 | Bottom source power MOSFET with substrateless and manufacturing method thereof | Yan Xun Xue, Ping Huang | 2013-10-29 |
| 8563361 | Packaging method of molded wafer level chip scale package (WLCSP) | Yan Xun Xue, Hamza Yilmaz, Jun Lu, Ping Huang, Lei Shi +2 more | 2013-10-22 |
| 8564049 | Flip chip contact (FCC) power package | Ming Sun, Kai Liu, Xiao Zhang, Leeshawn Luo | 2013-10-22 |
| 8564110 | Power device with bottom source electrode | Yan Xun Xue, Hamza Yilmaz, Jun Lu, Lei Shi, Liang Zhao +1 more | 2013-10-22 |
| 8563417 | Method for packaging ultra-thin chip with solder ball thermo-compression in wafer level packaging process | Jun Lu, Alex Niu, Ping Hoang, Jacky Gong, Yan Xun Xue +2 more | 2013-10-22 |
| 8513784 | Multi-layer lead frame package and method of fabrication | Jun Lu, Ming Sun, Kai Liu, Lei Shi | 2013-08-20 |
| 8481368 | Semiconductor package of a flipped MOSFET and its manufacturing method | Yan Xun Xue, Hamza Yilmaz, Jun Lu | 2013-07-09 |
| 8476752 | Package structure for DC-DC converter | Yan Xun Xue, Jun Lu | 2013-07-02 |
| 8436429 | Stacked power semiconductor device using dual lead frame and manufacturing method | Yan Xun Xue, Lei Shi, Jun Lu, Liang Zhao | 2013-05-07 |
| 8426960 | Wafer level chip scale packaging | Ming Sun, Tao Feng, Francois Hebert | 2013-04-23 |
| 8362606 | Wafer level chip scale package | Yan Xun Xue | 2013-01-29 |
| 8330264 | Packaging configurations for vertical electronic devices using conductive traces disposed on laminated board layers | Ming Sun | 2012-12-11 |
| 8242013 | Virtually substrate-less composite power semiconductor device and method | Tao Feng | 2012-08-14 |
| 8217503 | Package structure for DC-DC converter | Yan Xun Xue, Jun Lu | 2012-07-10 |
| 8169062 | Integrated circuit package for semiconductior devices with improved electric resistance and inductance | Leeshawn Luo, Anup Bhalla, Sik Lui, Mike F. Chang | 2012-05-01 |
| 8168477 | Packaging configurations for vertical electronic devices using conductive traces disposed on laminated board layers | Ming Sun | 2012-05-01 |