Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9337132 | Methods and configuration for manufacturing flip chip contact (FCC) power package | Ming Sun, Kai Liu, Xiaotian Zhang, Yueh-Se Ho | 2016-05-10 |
| 8564049 | Flip chip contact (FCC) power package | Ming Sun, Kai Liu, Xiao Zhang, Yueh-Se Ho | 2013-10-22 |
| 8169062 | Integrated circuit package for semiconductior devices with improved electric resistance and inductance | Anup Bhalla, Yueh-Se Ho, Sik Lui, Mike F. Chang | 2012-05-01 |
| 8067822 | Integrated circuit package for semiconductor devices with improved electric resistance and inductance | Anup Bhalla, Yueh-Se Ho, Sik Lui, Mike F. Chang | 2011-11-29 |
| 7951651 | Dual flat non-leaded semiconductor package | Kai Liu, Xiaotian Zhang, Ming Sun | 2011-05-31 |
| 7897438 | Method of making semiconductor package with plated connection | Kai Liu, Ming Sun, Xiao Zhang | 2011-03-01 |
| 7633140 | Inverted J-lead for power devices | Anup Bhalla, Sik Lui, Yueh-Se Ho, Mike F. Chang, Xiao Tiang Zhang | 2009-12-15 |
| 7394151 | Semiconductor package with plated connection | Kai Liu, Ming Sun, Xiao Zhang | 2008-07-01 |
| 7391100 | Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area | Anup Bhalla, Yueh-Se Ho, Sik Lui, Mike F. Chang | 2008-06-24 |
| 7208818 | Power semiconductor package | Anup Bhalla, Sik Lui, Yueh-Se Ho, Mike F. Chang, Xiao Zhang | 2007-04-24 |
| 7183616 | High speed switching MOSFETS using multi-parallel die packages with/without special leadframes | Anup Bhalla, Sik Lui, Yueh-Se Ho | 2007-02-27 |
| 6841852 | Integrated circuit package for semiconductor devices with improved electric resistance and inductance | Anup Bhalla, Yueh-Se Ho, Sik Lui, Mike F. Chang | 2005-01-11 |