Issued Patents 2024
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12014959 | Integrated nanowire and nanoribbon patterning in transistor manufacture | Leonard P. GULER, Biswajeet Guha, Mark Armstrong, William Hsu | 2024-06-18 |
| 12002810 | Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up approach | Dax M. Crum, Biswajeet Guha, Leonard P. GULER | 2024-06-04 |
| 11997847 | Thin film transistors with spacer controlled gate length | Abhishek A. Sharma, Van H. Le, Gilbert Dewey, Shriram Shivaraman, Yih Wang +1 more | 2024-05-28 |
| 11996447 | Field effect transistors with gate electrode self-aligned to semiconductor fin | Sean T. Ma, Matthew V. Metz, Willy Rachmady, Gilbert Dewey, Chandra S. Mohapatra +2 more | 2024-05-28 |
| 11996362 | Integrated circuit device with crenellated metal trace layout | Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Rishabh Mehandru, Ranjith Kumar | 2024-05-28 |
| 11990472 | Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates | Leonard P. GULER, Michael K. Harper, William Hsu, Biswajeet Guha, Niels Zussblatt +6 more | 2024-05-21 |
| 11991873 | Capacitor separations in dielectric layers | Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more | 2024-05-21 |
| 11984449 | Channel structures with sub-fin dopant diffusion blocking layers | Cory Bomberger, Anand S. Murthy, Stephen M. Cea, Biswajeet Guha, Anupama Bowonder | 2024-05-14 |
| 11978804 | Recessed thin-channel thin-film transistor | Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Yih Wang | 2024-05-07 |
| 11929435 | Ferroelectric gate stack for band-to-band tunneling reduction | Gilbert Dewey, Willy Rachmady, Jack T. Kavalieros, Cheng-Ying Huang, Matthew V. Metz +2 more | 2024-03-12 |
| 11929396 | Cavity spacer for nanowire transistors | William Hsu, Biswajeet Guha, Leonard P. GULER, Souvik Chakrabarty, Jun Sung Kang +1 more | 2024-03-12 |
| 11923410 | Transistor with isolation below source and drain | Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma +3 more | 2024-03-05 |
| 11923421 | Integrated circuit structures having germanium-based channels | Siddharth Chouksey, Glenn A. Glass, Anand S. Murthy, Harold W. Kennel, Jack T. Kavalieros +2 more | 2024-03-05 |
| 11923370 | Forksheet transistors with dielectric or conductive spine | Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more | 2024-03-05 |
| 11908856 | Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact | Biswajeet Guha, William Hsu, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka +5 more | 2024-02-20 |
| 11908934 | Semiconductor device having doped epitaxial region and its methods of fabrication | Anand S. Murthy, Daniel Bourne Aubertine, Abhijit Jayant Pethe | 2024-02-20 |
| 11901347 | Microelectronic package with three-dimensional (3D) monolithic memory die | Wilfred Gomes, Mauro J. Kobrinsky, Doug B. Ingerly | 2024-02-13 |
| 11894368 | Gate-all-around integrated circuit structures fabricated using alternate etch selective material | Sudipto Naskar, Biswajeet Guha, William Hsu, Bruce Beattie | 2024-02-06 |
| 11887891 | Self-aligned contacts | Mark Bohr, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus +2 more | 2024-01-30 |
| 11869939 | Integration methods to fabricate internal spacers for nanowire devices | Seiyon Kim, Kelin J. Kuhn, Anand S. Murthy, Mark Armstrong, Rafael Rios +2 more | 2024-01-09 |
| 11869987 | Gate-all-around integrated circuit structures including varactors | Ayan Kar, Saurabh Morarka, Carlos Nieva-Lozano, Kalyan C. Kolluru, Biswajeet Guha +2 more | 2024-01-09 |
| 11869891 | Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process | Jun Sung Kang, Kai Loon Cheong, Erica J. Thompson, Biswajeet Guha, William Hsu +2 more | 2024-01-09 |
| 11862728 | Dual gate control for trench shaped thin film transistors | Abhishek A. Sharma, Van H. Le, Gilbert Dewey, Jack T. Kavalieros, Shriram Shivaraman +2 more | 2024-01-02 |
| 11862635 | Neighboring gate-all-around integrated circuit structures having disjoined epitaxial source or drain regions | Leonard P. GULER, Biswajeet Guha, Swaminathan Sivakumar | 2024-01-02 |