LG

Leonard P. GULER

IN Intel: 14 patents #71 of 4,430Top 2%
Overall (2024): #4,926 of 561,600Top 1%
14
Patents 2024

Issued Patents 2024

Patent #TitleCo-InventorsDate
12131991 Self aligned gratings for tight pitch interconnects and methods of fabrication Manish Chandhok, Paul A. Nyhus, Gobind Bisht, Jonathan Laib, David Shykind +5 more 2024-10-29
12131989 Vertical metal splitting using helmets and wrap-around dielectric spacers Charles H. Wallace, Paul A. Nyhus 2024-10-29
12080639 Contact over active gate structures with metal oxide layers to inhibit shorting Rami Hourani, Manish Chandhok, Richard E. Schenker, Florian Gstrein, Charles H. Wallace +4 more 2024-09-03
12068314 Fabrication of gate-all-around integrated circuit structures having adjacent island structures William Hsu, Biswajeet Guha, Martin Weiss, Apratim Dhar, William T. BLANTON +7 more 2024-08-20
12057491 Self-aligned gate endcap (SAGE) architectures with gate-all-around devices above insulator substrates Biswajeet Guha, Dax M. Crum, Stephen M. Cea, Tahir Ghani 2024-08-06
12051623 Enhanced grating aligned patterning for EUV direct print processes Seyedhamed M Barghi, Shyam Benegal KADALI, Marvin Young Paik, Sheng-Po Fang, Charles H. Wallace +1 more 2024-07-30
12046652 Plug and recess process for dual metal gate on stacked nanoribbon devices Nicole K. Thomas, Michael K. Harper, Marko Radosavljevic, Thoe Michaelos 2024-07-23
12014959 Integrated nanowire and nanoribbon patterning in transistor manufacture Biswajeet Guha, Mark Armstrong, Tahir Ghani, William Hsu 2024-06-18
12002810 Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up approach Dax M. Crum, Biswajeet Guha, Tahir Ghani 2024-06-04
11990472 Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates Michael K. Harper, William Hsu, Biswajeet Guha, Tahir Ghani, Niels Zussblatt +6 more 2024-05-21
11972979 1D vertical edge blocking (VEB) via and plug Michael K. Harper, Suzanne S. Rich, Charles H. Wallace, Curtis W. Ward, Richard E. Schenker +4 more 2024-04-30
11929396 Cavity spacer for nanowire transistors William Hsu, Biswajeet Guha, Souvik Chakrabarty, Jun Sung Kang, Bruce Beattie +1 more 2024-03-12
11901458 Dielectric isolation layer between a nanowire transistor and a substrate Bruce Beattie, Biswajeet Guha, Jun Sung Kang, William Hsu 2024-02-13
11862635 Neighboring gate-all-around integrated circuit structures having disjoined epitaxial source or drain regions Biswajeet Guha, Tahir Ghani, Swaminathan Sivakumar 2024-01-02