Issued Patents 2022
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11508676 | Density-graded adhesion layer for conductors | Rahul N. Manepalli, Srinivas V. Pietambaram, Cemil Geyik | 2022-11-22 |
| 11456281 | Architecture and processes to enable high capacity memory packages through memory die stacking | Yi Li, Zhiguo Qian, Prasad Ramanathan, Saikumar Jayaraman, Hector Amador +3 more | 2022-09-27 |
| 11450629 | Intra-semiconductor die communication via waveguide in a multi-die semiconductor package | Zhi Qian, Jian Yong XIE | 2022-09-20 |
| 11437366 | Tunable passive semiconductor elements | Zhichao Zhang, Yidnekachew S. Mekonnen | 2022-09-06 |
| 11387188 | High density interconnect structures configured for manufacturing and performance | Henning Braunisch, Ajay Jain, Zhiguo Qian | 2022-07-12 |
| 11322445 | EMIB copper layer for signal and power routing | Yidnekachew S. Mekonnen, Dae-Woo Kim, Sujit Sharan | 2022-05-03 |
| 11296031 | Dielectric-filled trench isolation of vias | Zhiguo Qian, Jianyong Xie | 2022-04-05 |
| 11295998 | Stiffener and package substrate for a semiconductor package | Stephen Christianson, Stephen H. Hall, Emile Davies-Venn, Dong-Ho Han, Konika Ganguly +4 more | 2022-04-05 |
| 11291133 | Selective ground flood around reduced land pad on package base layer to enable high speed land grid array (LGA) socket | Zhichao Zhang, Gregorio R. Murtagian, Kuang Liu | 2022-03-29 |
| 11276635 | Horizontal pitch translation using embedded bridge dies | Sujit Sharan, Zhiguo Qian, Yidnekachew S. Mekonnen, Zhichao Zhang, Jianyong Xie | 2022-03-15 |
| 11244890 | Ground via clustering for crosstalk mitigation | Zhiguo Qian, Yu Zhang | 2022-02-08 |
| 11222847 | Enabling long interconnect bridges | Ravindranath V. Mahajan, Zhiguo Qian, Henning Braunisch, Sujit Sharan | 2022-01-11 |
| 11222848 | Power delivery for embedded bridge die utilizing trench structures | Zhiguo Qian, Jianyong Xie | 2022-01-11 |