Issued Patents 2021
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211333 | Through silicon via optimization for three-dimensional integrated circuits | Chin-Chou Liu, Chin-Her Chien, Po-Hsiang Huang, Noor Mohamed Ettuveettil | 2021-12-28 |
| 11182533 | Standard cells and variations thereof within a standard cell library | Sheng-Hsiung Chen, Jerry Chang Jui Kao, Po-Hsiang Huang, Shao-Huan Wang, XinYong WANG +2 more | 2021-11-23 |
| 11170152 | Integrated circuit and layout method for standard cell structures | Sheng-Hsiung Chen, Chung-Te Lin, Ho Che Yu, Li-Chun Tien | 2021-11-09 |
| 11170149 | Placement constraint method for multiple patterning of cell-based chip design | Shao-Huan Wang, Sheng-Hsiung Chen, Po-Hsiang Huang | 2021-11-09 |
| 11138360 | Semiconductor device with filler cell region, method of generating layout diagram and system for same | Po-Hsiang Huang, Chin-Chou Liu, Sheng-Hsiung Chen, Hui-Zhong Zhuang, Meng Wang +2 more | 2021-10-05 |
| 11138362 | Integrated circuit layout method and system | Po-Hsiang Huang, Sheng-Hsiung Chen | 2021-10-05 |
| 11132488 | Method of modifying cell, system for modifying cell and global connection routing method | Sheng-Hsiung Chen, Jyun-Hao Chang, Ting-Wei Chiang, I-Lun Tseng, Po-Hsiang Huang | 2021-09-28 |
| 11094608 | Heat dissipation structure including stacked chips surrounded by thermal interface material rings | Po-Hsiang Huang, Chin-Chou Liu, Chin-Her Chien, Hui Yu Lee | 2021-08-17 |
| 11088084 | Electromagnetic shielding metal-insulator-metal capacitor structure | Hui Yu Lee, Chin-Chou Liu, Cheng-Hung Yeh, Po-Hsiang Huang, Yi-Kan Cheng +1 more | 2021-08-10 |
| 11080453 | Integrated circuit fin layout method, system, and structure | Po-Hsiang Huang, Sheng-Hsiung Chen, Chih-Hsin Ko, Clement Hsingjen Wann, Li-Chun Tien +1 more | 2021-08-03 |
| 11081426 | 3D IC power grid | Noor Mohamed, Po-Hsiang Huang, Chin-Chou Liu | 2021-08-03 |
| 11043473 | Integrated circuit including a first semiconductor wafer and a second semiconductor wafer, semiconductor device including a first semiconductor wafer and a second semiconductor wafer and method of manufacturing same | Chih-Lin Chen, Chin-Chou Liu, Hui Yu Lee, Po-Hsiang Huang | 2021-06-22 |
| 11037920 | Pin modification for standard cells | Sheng-Hsiung Chen, Ting-Wei Chiang, Chung-Te Lin, Jung-Chan Yang, Lee-Chung Lu +2 more | 2021-06-15 |
| 11030366 | Method and system of expanding set of standard cells which comprise a library | Chi-Lin Liu, Sheng-Hsiung Chen, Jerry Chang Jui Kao, Lee-Chung Lu, Shang-Chih Hsieh +1 more | 2021-06-08 |
| 11030372 | Method for generating layout diagram including cell having pin patterns and semiconductor device based on same | Pin-Dai Sue, Chin-Chou Liu, Sheng-Hsiung Chen, Lee-Chung Lu, Yen-Hung Lin +4 more | 2021-06-08 |
| 10997348 | Metal cut region location method and system | Jung-Chan Yang, Li-Chun Tien, Ting Yu Chen | 2021-05-04 |
| 10977418 | Semiconductor device with cell region, method of generating layout diagram and system for same | Sheng-Hsiung Chen, Ho Che Yu | 2021-04-13 |
| 10970450 | Cell structures and semiconductor devices having same | Jyun-Hao Chang, Sheng-Hsiung Chen, Ho Che Yu, Lee-Chung Lu, Ni-Wan Fan +3 more | 2021-04-06 |
| 10964685 | Integrated circuit and method of generating integrated circuit layout | Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen, Po-Hsiang Huang +3 more | 2021-03-30 |
| 10949597 | Through-silicon vias in integrated circuit packaging | Chin-Chou Liu, Chin-Her Chien, Cheng-Hung Yeh, Po-Hsiang Huang, Sen-Bor Jan +2 more | 2021-03-16 |
| 10943729 | Entangled inductor structures | Ka Fai Chang, Chin-Chou Liu, Hui Yu Lee, Yi-Kan Cheng | 2021-03-09 |
| 10903239 | Integrated circuit device with improved layout | Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao +2 more | 2021-01-26 |