Issued Patents 2021
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11182529 | Semiconductor device including power-grid-adapted route-spacing and method for generating layout diagram of same | Li-Chun Tien, Shun Li Chen, Ting Yu Chen, XinYong WANG | 2021-11-23 |
| 11177256 | Odd-fin height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same | Hui-Zhong Zhuang, Chung-Te Lin, Lee-Chung Lu, Li-Chun Tien, Ting Yu Chen | 2021-11-16 |
| 11132488 | Method of modifying cell, system for modifying cell and global connection routing method | Sheng-Hsiung Chen, Jyun-Hao Chang, Fong-Yuan Chang, I-Lun Tseng, Po-Hsiang Huang | 2021-09-28 |
| 11093684 | Power rail with non-linear edge | Jung-Chan Yang, Hui-Zhong Zhuang, Chi-Yu Lu | 2021-08-17 |
| 11088067 | Semiconductor device and layout design thereof | Chung-Te Lin, Hui-Zhong Zhuang, Li-Chun Tien, Pin-Dai Sue | 2021-08-10 |
| 11080461 | Method for improved cut metal patterning | Kuang-Ching Chang, Hui-Zhong Zhuang, Jung-Chan Yang | 2021-08-03 |
| 11075164 | Semiconductor device including a conductive feature over an active region | Tung-Heng Hsieh, Chung-Te Lin, Hui-Zhong Zhuang, Li-Chun Tien, Sheng-Hsiung Wang | 2021-07-27 |
| 11074390 | Method of designing an integrated circuit and integrated circuit | Chien-Hsing Li, Jung-Chan Yang, Ting Yu Chen | 2021-07-27 |
| 11048849 | Integrated circuit and method of manufacturing the same | Pochun Wang, Hui-Zhong Zhuang, Yu-Jung Chang | 2021-06-29 |
| 11050415 | Flip-flop with delineated layout for reduced footprint | Chi-Lin Liu, Jerry Chang Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh +1 more | 2021-06-29 |
| 11037957 | Semiconductor structure | Hsueh-Chih Chou, Chia Hao Tu, Sang Hoo Dhong, Lee-Chung Lu, Li-Chun Tien +1 more | 2021-06-15 |
| 11037920 | Pin modification for standard cells | Fong-Yuan Chang, Sheng-Hsiung Chen, Chung-Te Lin, Jung-Chan Yang, Lee-Chung Lu +2 more | 2021-06-15 |
| 11031334 | Semiconductor device including a conductive feature over an active region | Tung-Heng Hsieh, Chung-Te Lin, Hui-Zhong Zhuang, Li-Chun Tien, Sheng-Hsiung Wang | 2021-06-08 |
| 11030373 | System for generating standard cell layout having engineering change order (ECO) cells | Li-Chun Tien, Shun Li Chen, Ting Yu Chen, XinYong WANG | 2021-06-08 |
| 11024622 | Integrated circuit having angled conductive feature | Tung-Heng Hsieh, Hui-Zhong Zhuang, Chung-Te Lin, Sheng-Hsiung Wang, Li-Chun Tien | 2021-06-01 |
| 11004855 | Buried metal track and methods forming same | Pochun Wang, Chih-Ming Lai, Hui-Zhong Zhuang, Jung-Chan Yang, Ru-Gun Liu +6 more | 2021-05-11 |
| 10970440 | Method and system for generating layout diagram for semiconductor device having engineering change order (ECO) cells | Mao-Wei Chiu, Hui-Zhong Zhuang, Li-Chun Tien, Chi-Yu Lu | 2021-04-06 |
| 10971586 | Double height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same | Jung-Chan Yang, Hui-Zhong Zhuang, Lee-Chung Lu, Li-Chun Tien | 2021-04-06 |
| 10970451 | Integrated circuit layout method, device, and system | Jian-Sing Li, Hui-Zhong Zhuang, Jung-Chan Yang, Li-Chun Tien, Ting Yu Chen +1 more | 2021-04-06 |
| 10950594 | Integrated circuit and method of fabricating the same | Chung-Te Lin, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien | 2021-03-16 |
| 10923426 | Standard-cell layout structure with horn power and smart metal cut | Ni-Wan Fan, Cheng-I Huang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan +1 more | 2021-02-16 |
| 10885254 | Integrated circuit and method of manufacturing same | Hui-Zhong Zhuang, Li-Chun Tien | 2021-01-05 |